| Message ID | 20231218-topic-7280_dmac_sdhci-v1-1-97af7efd64a1@linaro.org |
|---|---|
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From: Konrad Dybcio <konrad.dybcio@linaro.org>
Date: Mon, 18 Dec 2023 15:38:33 +0100
Subject: [PATCH] arm64: dts: qcom: sc7280: Mark SDHCI hosts as
cache-coherent
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arm64: dts: qcom: sc7280: Mark SDHCI hosts as cache-coherent
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Commit Message
Konrad Dybcio
Dec. 18, 2023, 2:38 p.m. UTC
The SDHCI hosts on SC7280 are cache-coherent, just like on most fairly
recent Qualcomm SoCs. Mark them as such.
Fixes: 298c81a7d44f ("arm64: dts: qcom: sc7280: Add nodes for eMMC and SD card")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 ++
1 file changed, 2 insertions(+)
---
base-commit: ceb2fe0d438644e1de06b9a6468a1fb8e2199c70
change-id: 20231218-topic-7280_dmac_sdhci-3a0a7e574e9e
Best regards,
Comments
On Mon, 18 Dec 2023 15:38:33 +0100, Konrad Dybcio wrote: > The SDHCI hosts on SC7280 are cache-coherent, just like on most fairly > recent Qualcomm SoCs. Mark them as such. > > Applied, thanks! [1/1] arm64: dts: qcom: sc7280: Mark SDHCI hosts as cache-coherent commit: 827f5fc8d912203c1f971e47d61130b13c6820ba Best regards,
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index ff1e07171dc4..83b5b76ba179 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -1000,6 +1000,7 @@ sdhc_1: mmc@7c4000 { bus-width = <8>; supports-cqe; + dma-coherent; qcom,dll-config = <0x0007642c>; qcom,ddr-config = <0x80040868>; @@ -3458,6 +3459,7 @@ sdhc_2: mmc@8804000 { operating-points-v2 = <&sdhc2_opp_table>; bus-width = <4>; + dma-coherent; qcom,dll-config = <0x0007642c>;