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(unknown [58.22.7.114]) by zwqz-smtp-mta-g5-3 (Coremail) with SMTP id _____wD333AB0H5lTn2nFw--.50366S2; Sun, 17 Dec 2023 18:40:05 +0800 (CST) From: Andy Yan <andyshrk@163.com> To: heiko@sntech.de Cc: krzysztof.kozlowski+dt@linaro.org, robh+dt@kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, Andy Yan <andy.yan@rock-chips.com> Subject: [PATCH 1/2] arm: dts: rockchip: Add psci for rk3036 Date: Sun, 17 Dec 2023 18:39:58 +0800 Message-Id: <20231217103959.2380661-1-andyshrk@163.com> X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: <linux-kernel.vger.kernel.org> List-Subscribe: <mailto:linux-kernel+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-kernel+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CM-TRANSID: _____wD333AB0H5lTn2nFw--.50366S2 X-Coremail-Antispam: 1Uf129KBjvdXoW7Gw1kJrW8WFy5Gr13tF48tFb_yoW3JFX_t3 WfW3W5Ka1rCr9Iq34DJw4ru347Cw48CFZ3Ww18uF1UJ3WSva1kXFWktayxJr15CFW2grZ3 GFWfXa1Sk3W3ujkaLaAFLSUrUUUUUb8apTn2vfkv8UJUUUU8Yxn0WfASr-VFAUDa7-sFnT 9fnUUvcSsGvfC2KfnxnUUI43ZEXa7IU0Kg4DUUUUU== X-CM-SenderInfo: 5dqg52xkunqiywtou0bp/xtbBnAxJXlghmCkkNwAAsc X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1785531037481988404 X-GMAIL-MSGID: 1785531037481988404 |
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[1/2] arm: dts: rockchip: Add psci for rk3036
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Commit Message
Andy Yan
Dec. 17, 2023, 10:39 a.m. UTC
From: Andy Yan <andy.yan@rock-chips.com> The system will hang at bringup secondary CPUs without psci node. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> --- arch/arm/boot/dts/rockchip/rk3036.dtsi | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/rockchip/rk3036.dtsi b/arch/arm/boot/dts/rockchip/rk3036.dtsi index 78686fc72ce6..5344803442a1 100644 --- a/arch/arm/boot/dts/rockchip/rk3036.dtsi +++ b/arch/arm/boot/dts/rockchip/rk3036.dtsi @@ -67,6 +67,11 @@ display-subsystem { ports = <&vop_out>; }; + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + }; + timer { compatible = "arm,armv7-timer"; arm,cpu-registers-not-fw-configured;