| Message ID | 20231213122017.102100-3-eugen.hristev@collabora.com |
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From: Eugen Hristev <eugen.hristev@collabora.com>
To: linux-media@vger.kernel.org, devicetree@vger.kernel.org,
linux-mediatek@lists.infradead.org
Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
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andrew-ct.chen@mediatek.com, matthias.bgg@gmail.com
Subject: [PATCH 3/4] arm64: dts: mediatek: mt8186: fix VENC power domain
clocks
Date: Wed, 13 Dec 2023 14:20:16 +0200
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[1/4] dt-bindings: media: mtk-vcodec-encoder: add dma-ranges
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Commit Message
Eugen Hristev
Dec. 13, 2023, 12:20 p.m. UTC
The larb clock is in fact a subsys clock, so it must be prefixed by
'subsys-' to be correctly identified in the driver.
Fixes: d9e43c1e7a38 ("arm64: dts: mt8186: Add power domains controller")
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
---
arch/arm64/boot/dts/mediatek/mt8186.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi index df0c04f2ba1d..66ead3f23336 100644 --- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi @@ -1061,7 +1061,7 @@ power-domain@MT8186_POWER_DOMAIN_VENC { reg = <MT8186_POWER_DOMAIN_VENC>; clocks = <&topckgen CLK_TOP_VENC>, <&vencsys CLK_VENC_CKE1_VENC>; - clock-names = "venc0", "larb"; + clock-names = "venc0", "subsys-larb"; mediatek,infracfg = <&infracfg_ao>; #power-domain-cells = <0>; };