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Tue, 12 Dec 2023 10:02:03 -0600 From: Suravee Suthikulpanit To: , , , CC: , , , , , , , , , , Suravee Suthikulpanit Subject: [RFC PATCH 1/6] iommu/amd: Update PASID, GATS, and GLX feature related macros Date: Tue, 12 Dec 2023 10:01:34 -0600 Message-ID: <20231212160139.174229-2-suravee.suthikulpanit@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231212160139.174229-1-suravee.suthikulpanit@amd.com> References: <20231212160139.174229-1-suravee.suthikulpanit@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: MN1PEPF0000ECDB:EE_|LV8PR12MB9359:EE_ X-MS-Office365-Filtering-Correlation-Id: 96aeb359-6461-49b3-147d-08dbfb2bafe0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: WHdhS27qTeKzis+U2tbplak2RUP2gAoNS3YLWomaFdYHWpzbitJJkWK602YniFfna/D0nYt0g7LKWpy59MnAN8bfRDtXnThw13K9tCNH+uiIcGKnB4gNyYpKGOwuXawmSVY33UdCnS9RClKsN+z9o/TZ5bx9lKkIvQHin9Gk8c8xrrgJp6Keab0WFaFcfyFDrgNCSIBtCP3D2kdspdxsrJ9hS+GRUSVT4RhNUT+xqPULwSUB+4kkUEMl8vC8atMvcqiJDknbhaBIWjxhIboNeUQmti6I1HezkEJL2CiBKIQEk/bWfwAH5LqdMCRzQ2e7CEUoLnN3iwitjRMUyDQ7Q/EW9LFTagb8TEpSbL4+Hc1aRiyXs/XadHxLSJMZgVNNwHj8kGCvyehOq6TVwytuaDiTajX454783sWHPGsmSadtw+mDay2nPnGBLkdhQ88712zBOplaZBWuwrO+F2xs94JY7gummRNAqkB/Si5YhBbAnYLHb1y1wQREx8U31C7J0bD16keJ/ElqLFRULmcAVC0OKehBymfB6x1fP7QUhIqu/SmZNLyn+xtBQQAzVqHXcvHzOmrwvQXan5RxbRXTXnqD619jeogs8JIqIs311MBDwJUoAf7fTRuKY64kfb5STzGCOemwdXZHyuDeUKdAjR4oCoSx3qH4Zjl5tTGFCIusAN03kCG3QKtOxpJZW6rbSFteCEbJljjlfdhUvsNeNUYurqy3SG+7ZMM6h9DBRjX46DiY5BC3Z69G4H8+qvTc6q2+xGv1kyGsuMu1fJf312i6lps0Krj25rLJWz3eOBE= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(376002)(136003)(346002)(396003)(39860400002)(230922051799003)(82310400011)(186009)(1800799012)(64100799003)(451199024)(40470700004)(36840700001)(46966006)(8676002)(8936002)(4326008)(2906002)(44832011)(40480700001)(316002)(40460700003)(7416002)(5660300002)(110136005)(70206006)(70586007)(54906003)(478600001)(36860700001)(26005)(336012)(426003)(36756003)(1076003)(7696005)(6666004)(41300700001)(2616005)(16526019)(81166007)(82740400003)(356005)(83380400001)(47076005)(86362001)(36900700001)(2101003);DIR:OUT;SFP:1101; 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Tue, 12 Dec 2023 08:02:20 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1785092579152552117 X-GMAIL-MSGID: 1785092579152552117 Clean up and reorder them according to the bit index. There is no functional change. Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/amd_iommu.h | 2 +- drivers/iommu/amd/amd_iommu_types.h | 13 +++++++------ drivers/iommu/amd/init.c | 8 ++++---- 3 files changed, 12 insertions(+), 11 deletions(-) diff --git a/drivers/iommu/amd/amd_iommu.h b/drivers/iommu/amd/amd_iommu.h index bbed268e8abc..108253edbeb0 100644 --- a/drivers/iommu/amd/amd_iommu.h +++ b/drivers/iommu/amd/amd_iommu.h @@ -106,7 +106,7 @@ static inline bool check_feature2(u64 mask) static inline int check_feature_gpt_level(void) { - return ((amd_iommu_efr >> FEATURE_GATS_SHIFT) & FEATURE_GATS_MASK); + return ((amd_iommu_efr & FEATURE_GATS_MASK) >> FEATURE_GATS_SHIFT); } static inline bool amd_iommu_gt_ppr_supported(void) diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_iommu_types.h index 3dc39bbc05fc..14f67a8cf755 100644 --- a/drivers/iommu/amd/amd_iommu_types.h +++ b/drivers/iommu/amd/amd_iommu_types.h @@ -93,8 +93,6 @@ #define FEATURE_GA BIT_ULL(7) #define FEATURE_HE BIT_ULL(8) #define FEATURE_PC BIT_ULL(9) -#define FEATURE_GATS_SHIFT (12) -#define FEATURE_GATS_MASK (3ULL) #define FEATURE_GAM_VAPIC BIT_ULL(21) #define FEATURE_GIOSUP BIT_ULL(48) #define FEATURE_HASUP BIT_ULL(49) @@ -102,11 +100,14 @@ #define FEATURE_HDSUP BIT_ULL(52) #define FEATURE_SNP BIT_ULL(63) -#define FEATURE_PASID_SHIFT 32 -#define FEATURE_PASID_MASK (0x1fULL << FEATURE_PASID_SHIFT) +#define FEATURE_GATS_SHIFT 12 +#define FEATURE_GATS_MASK (0x03ULL << FEATURE_GATS_SHIFT) -#define FEATURE_GLXVAL_SHIFT 14 -#define FEATURE_GLXVAL_MASK (0x03ULL << FEATURE_GLXVAL_SHIFT) +#define FEATURE_GLX_SHIFT 14 +#define FEATURE_GLX_MASK (0x03ULL << FEATURE_GLX_SHIFT) + +#define FEATURE_PASMAX_SHIFT 32 +#define FEATURE_PASMAX_MASK (0x1FULL << FEATURE_PASMAX_SHIFT) /* Extended Feature 2 Bits */ #define FEATURE_SNPAVICSUP_SHIFT 5 diff --git a/drivers/iommu/amd/init.c b/drivers/iommu/amd/init.c index 959820ccfbcc..e84c69fe13d4 100644 --- a/drivers/iommu/amd/init.c +++ b/drivers/iommu/amd/init.c @@ -2080,14 +2080,14 @@ static int __init iommu_init_pci(struct amd_iommu *iommu) int glxval; u64 pasmax; - pasmax = amd_iommu_efr & FEATURE_PASID_MASK; - pasmax >>= FEATURE_PASID_SHIFT; + pasmax = amd_iommu_efr & FEATURE_PASMAX_MASK; + pasmax >>= FEATURE_PASMAX_SHIFT; iommu->iommu.max_pasids = (1 << (pasmax + 1)) - 1; BUG_ON(iommu->iommu.max_pasids & ~PASID_MASK); - glxval = amd_iommu_efr & FEATURE_GLXVAL_MASK; - glxval >>= FEATURE_GLXVAL_SHIFT; + glxval = amd_iommu_efr & FEATURE_GLX_MASK; + glxval >>= FEATURE_GLX_SHIFT; if (amd_iommu_max_glx_val == -1) amd_iommu_max_glx_val = glxval;