diff mbox series

[net-next,v2] net: mvpp2: add support for mii

Message ID 20231212141200.62579-1-eichest@gmail.com
State New
Headers
Series [net-next,v2] net: mvpp2: add support for mii |

Commit Message

Stefan Eichenberger Dec. 12, 2023, 2:12 p.m. UTC 
  Currently, mvpp2 only supports RGMII. This commit adds support for MII.
The description in Marvell's functional specification seems to be wrong.
To enable MII, we need to set GENCONF_CTRL0_PORT3_RGMII, while for RGMII
we need to clear it. This is also how U-Boot handles it.

Signed-off-by: Stefan Eichenberger <eichest@gmail.com>
---
v2:
- Remove PHY_INTERFACE_MODE_100BASEX from supported_interfaces (Maxime)
---
 .../net/ethernet/marvell/mvpp2/mvpp2_main.c   | 21 ++++++++++++++++---
 1 file changed, 18 insertions(+), 3 deletions(-)

Comments

Maxime Chevallier Dec. 12, 2023, 4:07 p.m. UTC | #1 
Hi Stefan,

On Tue, 12 Dec 2023 15:12:00 +0100
Stefan Eichenberger <eichest@gmail.com> wrote:

> Currently, mvpp2 only supports RGMII. This commit adds support for MII.
> The description in Marvell's functional specification seems to be wrong.
> To enable MII, we need to set GENCONF_CTRL0_PORT3_RGMII, while for RGMII
> we need to clear it. This is also how U-Boot handles it.
> 
> Signed-off-by: Stefan Eichenberger <eichest@gmail.com>

Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com>

Thanks for the patch,

Maxime
Marcin Wojtas Dec. 12, 2023, 5:39 p.m. UTC | #2 
Hi,

wt., 12 gru 2023 o 17:07 Maxime Chevallier
<maxime.chevallier@bootlin.com> napisał(a):
>
> Hi Stefan,
>
> On Tue, 12 Dec 2023 15:12:00 +0100
> Stefan Eichenberger <eichest@gmail.com> wrote:
>
> > Currently, mvpp2 only supports RGMII. This commit adds support for MII.
> > The description in Marvell's functional specification seems to be wrong.
> > To enable MII, we need to set GENCONF_CTRL0_PORT3_RGMII, while for RGMII
> > we need to clear it. This is also how U-Boot handles it.
> >
> > Signed-off-by: Stefan Eichenberger <eichest@gmail.com>
>
> Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com>

LGTM, as well.
Reviewed-by: Marcin Wojtas <mw@semihalf.com>

Best regards,
Marcin
Russell King (Oracle) Dec. 12, 2023, 7:19 p.m. UTC | #3 
On Tue, Dec 12, 2023 at 03:12:00PM +0100, Stefan Eichenberger wrote:
> Currently, mvpp2 only supports RGMII. This commit adds support for MII.
> The description in Marvell's functional specification seems to be wrong.
> To enable MII, we need to set GENCONF_CTRL0_PORT3_RGMII, while for RGMII
> we need to clear it. This is also how U-Boot handles it.
> 
> Signed-off-by: Stefan Eichenberger <eichest@gmail.com>

LGTM.

Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>

Thanks!
patchwork-bot+netdevbpf@kernel.org Dec. 14, 2023, 3:10 p.m. UTC | #4 
Hello:

This patch was applied to netdev/net-next.git (main)
by Paolo Abeni <pabeni@redhat.com>:

On Tue, 12 Dec 2023 15:12:00 +0100 you wrote:
> Currently, mvpp2 only supports RGMII. This commit adds support for MII.
> The description in Marvell's functional specification seems to be wrong.
> To enable MII, we need to set GENCONF_CTRL0_PORT3_RGMII, while for RGMII
> we need to clear it. This is also how U-Boot handles it.
> 
> Signed-off-by: Stefan Eichenberger <eichest@gmail.com>
> 
> [...]

Here is the summary with links:
  - [net-next,v2] net: mvpp2: add support for mii
    https://git.kernel.org/netdev/net-next/c/1b666016d0ad

You are awesome, thank you!
diff mbox series

Patch

diff --git a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
index 93137606869e..c5f72a1ef928 100644
--- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
+++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
@@ -1513,10 +1513,21 @@  static void mvpp22_gop_init_rgmii(struct mvpp2_port *port)
 	regmap_write(priv->sysctrl_base, GENCONF_PORT_CTRL0, val);
 
 	regmap_read(priv->sysctrl_base, GENCONF_CTRL0, &val);
-	if (port->gop_id == 2)
+	if (port->gop_id == 2) {
 		val |= GENCONF_CTRL0_PORT2_RGMII;
-	else if (port->gop_id == 3)
+	} else if (port->gop_id == 3) {
 		val |= GENCONF_CTRL0_PORT3_RGMII_MII;
+
+		/* According to the specification, GENCONF_CTRL0_PORT3_RGMII
+		 * should be set to 1 for RGMII and 0 for MII. However, tests
+		 * show that it is the other way around. This is also what
+		 * U-Boot does for mvpp2, so it is assumed to be correct.
+		 */
+		if (port->phy_interface == PHY_INTERFACE_MODE_MII)
+			val |= GENCONF_CTRL0_PORT3_RGMII;
+		else
+			val &= ~GENCONF_CTRL0_PORT3_RGMII;
+	}
 	regmap_write(priv->sysctrl_base, GENCONF_CTRL0, val);
 }
 
@@ -1615,6 +1626,7 @@  static int mvpp22_gop_init(struct mvpp2_port *port, phy_interface_t interface)
 		return 0;
 
 	switch (interface) {
+	case PHY_INTERFACE_MODE_MII:
 	case PHY_INTERFACE_MODE_RGMII:
 	case PHY_INTERFACE_MODE_RGMII_ID:
 	case PHY_INTERFACE_MODE_RGMII_RXID:
@@ -6948,8 +6960,11 @@  static int mvpp2_port_probe(struct platform_device *pdev,
 					MAC_10000FD;
 		}
 
-		if (mvpp2_port_supports_rgmii(port))
+		if (mvpp2_port_supports_rgmii(port)) {
 			phy_interface_set_rgmii(port->phylink_config.supported_interfaces);
+			__set_bit(PHY_INTERFACE_MODE_MII,
+				  port->phylink_config.supported_interfaces);
+		}
 
 		if (comphy) {
 			/* If a COMPHY is present, we can support any of the