Message ID | 20231211175023.1680247-12-mike.rudenko@gmail.com |
---|---|
State | New |
Headers |
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Mon, 11 Dec 2023 09:50:56 -0800 (PST) From: Mikhail Rudenko <mike.rudenko@gmail.com> To: linux-media@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Sakari Ailus <sakari.ailus@linux.intel.com>, Laurent Pinchart <laurent.pinchart@ideasonboard.com>, Jacopo Mondi <jacopo@jmondi.org>, Tommaso Merciai <tommaso.merciai@amarulasolutions.com>, Christophe JAILLET <christophe.jaillet@wanadoo.fr>, Dave Stevenson <dave.stevenson@raspberrypi.com>, Mauro Carvalho Chehab <mchehab@kernel.org>, Mikhail Rudenko <mike.rudenko@gmail.com> Subject: [PATCH 11/19] media: i2c: ov4689: Implement vflip/hflip controls Date: Mon, 11 Dec 2023 20:50:14 +0300 Message-ID: <20231211175023.1680247-12-mike.rudenko@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20231211175023.1680247-1-mike.rudenko@gmail.com> References: <20231211175023.1680247-1-mike.rudenko@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-0.6 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); 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Series |
Omnivision OV4689 refactoring and improvements
|
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Commit Message
Mikhail Rudenko
Dec. 11, 2023, 5:50 p.m. UTC
The OV4689 sensor supports horizontal and vertical flipping. Add
appropriate controls to the driver. Toggling both array flip and
digital flip bits allows to achieve flipping while maintaining output
Bayer order. Note that the default value of hflip control corresponds
to both bits set, as it was before this patch.
Signed-off-by: Mikhail Rudenko <mike.rudenko@gmail.com>
---
drivers/media/i2c/ov4689.c | 24 ++++++++++++++++++++++--
1 file changed, 22 insertions(+), 2 deletions(-)
Comments
Hi Mikhail, Thank you for the patch. On Mon, Dec 11, 2023 at 08:50:14PM +0300, Mikhail Rudenko wrote: > The OV4689 sensor supports horizontal and vertical flipping. Add > appropriate controls to the driver. Toggling both array flip and > digital flip bits allows to achieve flipping while maintaining output > Bayer order. Note that the default value of hflip control corresponds > to both bits set, as it was before this patch. What happens if only hlip or vflip is set, does the bayer pattern change ? Sakari, I think this patch could use your attention. > Signed-off-by: Mikhail Rudenko <mike.rudenko@gmail.com> > --- > drivers/media/i2c/ov4689.c | 24 ++++++++++++++++++++++-- > 1 file changed, 22 insertions(+), 2 deletions(-) > > diff --git a/drivers/media/i2c/ov4689.c b/drivers/media/i2c/ov4689.c > index 67d4004bdcfb..62aeae43d749 100644 > --- a/drivers/media/i2c/ov4689.c > +++ b/drivers/media/i2c/ov4689.c > @@ -46,6 +46,14 @@ > #define OV4689_HTS_DIVIDER 4 > #define OV4689_HTS_MAX 0x7fff > > +#define OV4689_REG_TIMING_FORMAT1 CCI_REG8(0x3820) > +#define OV4689_REG_TIMING_FORMAT2 CCI_REG8(0x3821) > +#define OV4689_TIMING_FLIP_MASK GENMASK(2, 1) > +#define OV4689_TIMING_FLIP_ARRAY BIT(1) > +#define OV4689_TIMING_FLIP_DIGITAL BIT(2) > +#define OV4689_TIMING_FLIP_BOTH (OV4689_TIMING_FLIP_ARRAY |\ > + OV4689_TIMING_FLIP_DIGITAL) > + > #define OV4689_LANES 4 > #define OV4689_XVCLK_FREQ 24000000 > > @@ -183,7 +191,6 @@ static const struct cci_reg_sequence ov4689_2688x1520_regs[] = { > {CCI_REG8(0x3811), 0x08}, /* H_WIN_OFF_L h_win_off[7:0] = 0x08*/ > {CCI_REG8(0x3813), 0x04}, /* V_WIN_OFF_L v_win_off[7:0] = 0x04 */ > {CCI_REG8(0x3819), 0x01}, /* VSYNC_END_L vsync_end_point[7:0] = 0x01 */ > - {CCI_REG8(0x3821), 0x06}, /* TIMING_FORMAT2 array_h_mirror = 1, digital_h_mirror = 1 */ > > /* OTP control */ > {CCI_REG8(0x3d85), 0x36}, /* OTP_REG85 OTP_power_up_load_setting_enable = 1, > @@ -605,6 +612,16 @@ static int ov4689_set_ctrl(struct v4l2_ctrl *ctrl) > (val + ov4689->cur_mode->width) / > OV4689_HTS_DIVIDER, &ret); > break; > + case V4L2_CID_VFLIP: > + cci_update_bits(regmap, OV4689_REG_TIMING_FORMAT1, > + OV4689_TIMING_FLIP_MASK, > + val ? OV4689_TIMING_FLIP_BOTH : 0, &ret); > + break; > + case V4L2_CID_HFLIP: > + cci_update_bits(regmap, OV4689_REG_TIMING_FORMAT2, > + OV4689_TIMING_FLIP_MASK, > + val ? 0 : OV4689_TIMING_FLIP_BOTH, &ret); > + break; > default: > dev_warn(dev, "%s Unhandled id:0x%x, val:0x%x\n", > __func__, ctrl->id, val); > @@ -633,7 +650,7 @@ static int ov4689_initialize_controls(struct ov4689 *ov4689) > > handler = &ov4689->ctrl_handler; > mode = ov4689->cur_mode; > - ret = v4l2_ctrl_handler_init(handler, 11); > + ret = v4l2_ctrl_handler_init(handler, 13); This should be 12 if my comment on 10/19 is correct. Further patches in the series may need to be adjusted too. > if (ret) > return ret; > > @@ -673,6 +690,9 @@ static int ov4689_initialize_controls(struct ov4689 *ov4689) > ARRAY_SIZE(ov4689_test_pattern_menu) - 1, > 0, 0, ov4689_test_pattern_menu); > > + v4l2_ctrl_new_std(handler, &ov4689_ctrl_ops, V4L2_CID_VFLIP, 0, 1, 1, 0); > + v4l2_ctrl_new_std(handler, &ov4689_ctrl_ops, V4L2_CID_HFLIP, 0, 1, 1, 0); > + > if (handler->error) { > ret = handler->error; > dev_err(ov4689->dev, "Failed to init controls(%d)\n", ret);
On 2023-12-12 at 00:10 +02, Laurent Pinchart <laurent.pinchart@ideasonboard.com> wrote: > Hi Mikhail, > > Thank you for the patch. > > On Mon, Dec 11, 2023 at 08:50:14PM +0300, Mikhail Rudenko wrote: >> The OV4689 sensor supports horizontal and vertical flipping. Add >> appropriate controls to the driver. Toggling both array flip and >> digital flip bits allows to achieve flipping while maintaining output >> Bayer order. Note that the default value of hflip control corresponds >> to both bits set, as it was before this patch. > > What happens if only hlip or vflip is set, does the bayer pattern change > ? If one changes both digital and analog flip bits (and this is what this driver does), bayer pattern stay the same for all possible vflip/hflip combinations. Unfortunately, the datasheet does not say much about these bits, but I have a hypothesis that the on-sensor ISP can somehow reorder pixels to keep the same bayer battern when asked. > Sakari, I think this patch could use your attention. > >> Signed-off-by: Mikhail Rudenko <mike.rudenko@gmail.com> >> --- >> drivers/media/i2c/ov4689.c | 24 ++++++++++++++++++++++-- >> 1 file changed, 22 insertions(+), 2 deletions(-) >> >> diff --git a/drivers/media/i2c/ov4689.c b/drivers/media/i2c/ov4689.c >> index 67d4004bdcfb..62aeae43d749 100644 >> --- a/drivers/media/i2c/ov4689.c >> +++ b/drivers/media/i2c/ov4689.c >> @@ -46,6 +46,14 @@ >> #define OV4689_HTS_DIVIDER 4 >> #define OV4689_HTS_MAX 0x7fff >> >> +#define OV4689_REG_TIMING_FORMAT1 CCI_REG8(0x3820) >> +#define OV4689_REG_TIMING_FORMAT2 CCI_REG8(0x3821) >> +#define OV4689_TIMING_FLIP_MASK GENMASK(2, 1) >> +#define OV4689_TIMING_FLIP_ARRAY BIT(1) >> +#define OV4689_TIMING_FLIP_DIGITAL BIT(2) >> +#define OV4689_TIMING_FLIP_BOTH (OV4689_TIMING_FLIP_ARRAY |\ >> + OV4689_TIMING_FLIP_DIGITAL) >> + >> #define OV4689_LANES 4 >> #define OV4689_XVCLK_FREQ 24000000 >> >> @@ -183,7 +191,6 @@ static const struct cci_reg_sequence ov4689_2688x1520_regs[] = { >> {CCI_REG8(0x3811), 0x08}, /* H_WIN_OFF_L h_win_off[7:0] = 0x08*/ >> {CCI_REG8(0x3813), 0x04}, /* V_WIN_OFF_L v_win_off[7:0] = 0x04 */ >> {CCI_REG8(0x3819), 0x01}, /* VSYNC_END_L vsync_end_point[7:0] = 0x01 */ >> - {CCI_REG8(0x3821), 0x06}, /* TIMING_FORMAT2 array_h_mirror = 1, digital_h_mirror = 1 */ >> >> /* OTP control */ >> {CCI_REG8(0x3d85), 0x36}, /* OTP_REG85 OTP_power_up_load_setting_enable = 1, >> @@ -605,6 +612,16 @@ static int ov4689_set_ctrl(struct v4l2_ctrl *ctrl) >> (val + ov4689->cur_mode->width) / >> OV4689_HTS_DIVIDER, &ret); >> break; >> + case V4L2_CID_VFLIP: >> + cci_update_bits(regmap, OV4689_REG_TIMING_FORMAT1, >> + OV4689_TIMING_FLIP_MASK, >> + val ? OV4689_TIMING_FLIP_BOTH : 0, &ret); >> + break; >> + case V4L2_CID_HFLIP: >> + cci_update_bits(regmap, OV4689_REG_TIMING_FORMAT2, >> + OV4689_TIMING_FLIP_MASK, >> + val ? 0 : OV4689_TIMING_FLIP_BOTH, &ret); >> + break; >> default: >> dev_warn(dev, "%s Unhandled id:0x%x, val:0x%x\n", >> __func__, ctrl->id, val); >> @@ -633,7 +650,7 @@ static int ov4689_initialize_controls(struct ov4689 *ov4689) >> >> handler = &ov4689->ctrl_handler; >> mode = ov4689->cur_mode; >> - ret = v4l2_ctrl_handler_init(handler, 11); >> + ret = v4l2_ctrl_handler_init(handler, 13); > > This should be 12 if my comment on 10/19 is correct. Further patches in > the series may need to be adjusted too. Ack, will fix in v2. >> if (ret) >> return ret; >> >> @@ -673,6 +690,9 @@ static int ov4689_initialize_controls(struct ov4689 *ov4689) >> ARRAY_SIZE(ov4689_test_pattern_menu) - 1, >> 0, 0, ov4689_test_pattern_menu); >> >> + v4l2_ctrl_new_std(handler, &ov4689_ctrl_ops, V4L2_CID_VFLIP, 0, 1, 1, 0); >> + v4l2_ctrl_new_std(handler, &ov4689_ctrl_ops, V4L2_CID_HFLIP, 0, 1, 1, 0); >> + >> if (handler->error) { >> ret = handler->error; >> dev_err(ov4689->dev, "Failed to init controls(%d)\n", ret); -- Best regards, Mikhail Rudenko
diff --git a/drivers/media/i2c/ov4689.c b/drivers/media/i2c/ov4689.c index 67d4004bdcfb..62aeae43d749 100644 --- a/drivers/media/i2c/ov4689.c +++ b/drivers/media/i2c/ov4689.c @@ -46,6 +46,14 @@ #define OV4689_HTS_DIVIDER 4 #define OV4689_HTS_MAX 0x7fff +#define OV4689_REG_TIMING_FORMAT1 CCI_REG8(0x3820) +#define OV4689_REG_TIMING_FORMAT2 CCI_REG8(0x3821) +#define OV4689_TIMING_FLIP_MASK GENMASK(2, 1) +#define OV4689_TIMING_FLIP_ARRAY BIT(1) +#define OV4689_TIMING_FLIP_DIGITAL BIT(2) +#define OV4689_TIMING_FLIP_BOTH (OV4689_TIMING_FLIP_ARRAY |\ + OV4689_TIMING_FLIP_DIGITAL) + #define OV4689_LANES 4 #define OV4689_XVCLK_FREQ 24000000 @@ -183,7 +191,6 @@ static const struct cci_reg_sequence ov4689_2688x1520_regs[] = { {CCI_REG8(0x3811), 0x08}, /* H_WIN_OFF_L h_win_off[7:0] = 0x08*/ {CCI_REG8(0x3813), 0x04}, /* V_WIN_OFF_L v_win_off[7:0] = 0x04 */ {CCI_REG8(0x3819), 0x01}, /* VSYNC_END_L vsync_end_point[7:0] = 0x01 */ - {CCI_REG8(0x3821), 0x06}, /* TIMING_FORMAT2 array_h_mirror = 1, digital_h_mirror = 1 */ /* OTP control */ {CCI_REG8(0x3d85), 0x36}, /* OTP_REG85 OTP_power_up_load_setting_enable = 1, @@ -605,6 +612,16 @@ static int ov4689_set_ctrl(struct v4l2_ctrl *ctrl) (val + ov4689->cur_mode->width) / OV4689_HTS_DIVIDER, &ret); break; + case V4L2_CID_VFLIP: + cci_update_bits(regmap, OV4689_REG_TIMING_FORMAT1, + OV4689_TIMING_FLIP_MASK, + val ? OV4689_TIMING_FLIP_BOTH : 0, &ret); + break; + case V4L2_CID_HFLIP: + cci_update_bits(regmap, OV4689_REG_TIMING_FORMAT2, + OV4689_TIMING_FLIP_MASK, + val ? 0 : OV4689_TIMING_FLIP_BOTH, &ret); + break; default: dev_warn(dev, "%s Unhandled id:0x%x, val:0x%x\n", __func__, ctrl->id, val); @@ -633,7 +650,7 @@ static int ov4689_initialize_controls(struct ov4689 *ov4689) handler = &ov4689->ctrl_handler; mode = ov4689->cur_mode; - ret = v4l2_ctrl_handler_init(handler, 11); + ret = v4l2_ctrl_handler_init(handler, 13); if (ret) return ret; @@ -673,6 +690,9 @@ static int ov4689_initialize_controls(struct ov4689 *ov4689) ARRAY_SIZE(ov4689_test_pattern_menu) - 1, 0, 0, ov4689_test_pattern_menu); + v4l2_ctrl_new_std(handler, &ov4689_ctrl_ops, V4L2_CID_VFLIP, 0, 1, 1, 0); + v4l2_ctrl_new_std(handler, &ov4689_ctrl_ops, V4L2_CID_HFLIP, 0, 1, 1, 0); + if (handler->error) { ret = handler->error; dev_err(ov4689->dev, "Failed to init controls(%d)\n", ret);