From patchwork Fri Dec 8 10:51:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 175774 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:bcd1:0:b0:403:3b70:6f57 with SMTP id r17csp5371888vqy; Fri, 8 Dec 2023 02:52:28 -0800 (PST) X-Google-Smtp-Source: AGHT+IH94ABF3BJT8aJXmMtwJiKkDT4gd+HQio43QKLQ2BqCQdwEw0oaJmKEovq0DZlVaNM/+Evd X-Received: by 2002:a05:6358:9392:b0:170:4035:4fe7 with SMTP id h18-20020a056358939200b0017040354fe7mr4920448rwb.34.1702032748723; Fri, 08 Dec 2023 02:52:28 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1702032748; cv=none; d=google.com; s=arc-20160816; b=0UnlpgAUX/HBiYED1FPPVWcXCTxztnSqxwVaKIz/B5ISzzLovOPjJK9+7iJ75oX7d/ GqU/VPU1jlQIjcdlDxdMe07GRd/niCyWpt2kOkQOzQf2p87K8gCnAWJkOO8743sez4Ea QIBkcLPEL0f7gURquAtbmNzGdRHAB1ya6lUSwlfWjTHXUpZibWkd1FG0mHbUj5uGCVo9 AlqhQnrXdjSgsUVgVu+mCYIP4TEdtxCb308+2GtkByGQOQqU8p5MFWbe99oEoqUGxWaT w66y2WEQHpA3QXQCzMgctMlRTtyHnB6e2ekVwLhXAYXQdFyAOcttXAq6ek85xebJQ+vj YQ6w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=3yFkfEp12aI+6U4wU/tq2gheT7TJS/3Q4MuYssvsV5A=; fh=1RhMavq3FdhDC2n8Wx4Gl3jp1HgwLZdEcP78NYjvh00=; b=tkF1zBLp08VLc8eByZQV7btIp3H2TyOTX2jxazWCk1evGoVNlj+64rRZI1p2D/diZi vPHD+pF+4ixc79EvMewDpNTibz4znm03tBSpu/LTOlQQ49a9ny5YkS4U/MC+dxLl/8oj Hllyxjkjk+7Jldt+RvMA8DRn/owV8EEiXCdTmii3Uzq2xDNwDbvWOSK7FXGx+g1JzXEk GqGU7HyVGBh+ajgOH7OpV0v5XYF+dH4oJWEdeJMkxQZ+ETEqgAKaRPh6ZPqr1WLoTxK3 QF3dlCslG+JtJU6oG3RvzVM+hmvhsQs4LIuA/5FwjgKNd4LZQpHkF7oV5xFSX61xXLjP WnxA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=M0Rz45jh; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from agentk.vger.email (agentk.vger.email. [23.128.96.32]) by mx.google.com with ESMTPS id f13-20020a056a001acd00b006cdce1d5ac7si1401218pfv.17.2023.12.08.02.52.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Dec 2023 02:52:28 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) client-ip=23.128.96.32; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=M0Rz45jh; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.32 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by agentk.vger.email (Postfix) with ESMTP id 98D8C80F8F58; Fri, 8 Dec 2023 02:52:25 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at agentk.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1573662AbjLHKwN (ORCPT + 99 others); Fri, 8 Dec 2023 05:52:13 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33200 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1573453AbjLHKwD (ORCPT ); Fri, 8 Dec 2023 05:52:03 -0500 Received: from mail-ej1-x634.google.com (mail-ej1-x634.google.com [IPv6:2a00:1450:4864:20::634]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0D748171C for ; Fri, 8 Dec 2023 02:52:09 -0800 (PST) Received: by mail-ej1-x634.google.com with SMTP id a640c23a62f3a-a1da1017a09so233856966b.3 for ; Fri, 08 Dec 2023 02:52:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1702032727; x=1702637527; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3yFkfEp12aI+6U4wU/tq2gheT7TJS/3Q4MuYssvsV5A=; b=M0Rz45jhRNrG+xtYKkVM6CRyO6pyceWKHaE6n+QuV0gBqAjk9meLRq4zCCqMcfSjkS 6hB5SvwddqVNQ6NSVVkSSlj2l4UIXHkYvQmjMNNauDhLDq5wYee1Jvwa2YzHDsKcUOyd r9MWgzAuTQyIGyN0fBYwTYd9xGJYYNuvRYi3S4dZGJDOuW9O2UUM9eoDp3WxYl0S/UgJ qZlLdh4YJY4rpWzftbmyRB76lDmLL8RvGMIfwrY+hoZxakVHNjrE1HSHsIxBQ0Ux9LfG HVXbMiVAAa/vQfHwNFNFPtfVeIvku6gI0tW9MLkkedR+Z4/ZxPxkfKNW13U0A5SeDaj8 cZmw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702032727; x=1702637527; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3yFkfEp12aI+6U4wU/tq2gheT7TJS/3Q4MuYssvsV5A=; b=IWjLiQahItZH15vcvy0Wwcir1C3ylEOWhaKnl8TdkLCtcCL1qBxBBMA93nU5jwASTL EoH6Jl9Yi4MvqwJGZlGoGzq5199C7vUJ3QbD6Z7tJNuzVNITSJ8rx3EyuVbwSL2iMeOC aXyVcet4uUpqq7E47MxGiHj8FGo5irGmsmc98ENto52zCOUg+jkTBOA1UVWeB8yX2Uh9 k7lPrgoMTLm8K1h+uO61J5KQ7+59MU15N71GFvFfAJ9l2UmCRg6XA+LqVxnJVXLqV1B9 HLyYLvL2iA/UURBQPtu4lXc2jaT/13sAhB5YKhPBwFpKmbL5fL5NmE3rzW2mXPVy0h0Y pQBA== X-Gm-Message-State: AOJu0YwkgKNtMHB14fFxbkY200uElV+51WIDl7hV4gTMnrUp8gpXqqnZ NVcb54XzdiR7EJjyoKS/71ed2w== X-Received: by 2002:a17:906:a856:b0:9e0:4910:166a with SMTP id dx22-20020a170906a85600b009e04910166amr2681680ejb.32.1702032727601; Fri, 08 Dec 2023 02:52:07 -0800 (PST) Received: from krzk-bin.. ([178.197.218.27]) by smtp.gmail.com with ESMTPSA id tx17-20020a1709078e9100b00a1b75e0e061sm849976ejc.130.2023.12.08.02.52.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Dec 2023 02:52:07 -0800 (PST) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Manivannan Sadhasivam , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH v3 4/4] arm64: dts: qcom: sm8150: add necessary ref clock to PCIe Date: Fri, 8 Dec 2023 11:51:55 +0100 Message-Id: <20231208105155.36097-4-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231208105155.36097-1-krzysztof.kozlowski@linaro.org> References: <20231208105155.36097-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Fri, 08 Dec 2023 02:52:25 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1784710691573150645 X-GMAIL-MSGID: 1784710691573150645 The PCIe nodes should get the ref clock, according to information from Qualcomm. Link: https://lore.kernel.org/all/20231121065440.GB3315@thinkpad/ Signed-off-by: Krzysztof Kozlowski --- Patch should go via Qcom tree, if the bindings get accepted. Changes in v3: 1. New patch --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index 5edc557ba04a..22ee3cd5549d 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -1858,14 +1858,16 @@ pcie0: pci@1c00000 { <&gcc GCC_PCIE_0_MSTR_AXI_CLK>, <&gcc GCC_PCIE_0_SLV_AXI_CLK>, <&gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK>, - <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>; + <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>, + <&rpmhcc RPMH_CXO_CLK>; clock-names = "pipe", "aux", "cfg", "bus_master", "bus_slave", "slave_q2a", - "tbu"; + "tbu", + "ref"; iommu-map = <0x0 &apps_smmu 0x1d80 0x1>, <0x100 &apps_smmu 0x1d81 0x1>; @@ -1949,14 +1951,16 @@ pcie1: pci@1c08000 { <&gcc GCC_PCIE_1_MSTR_AXI_CLK>, <&gcc GCC_PCIE_1_SLV_AXI_CLK>, <&gcc GCC_PCIE_1_SLV_Q2A_AXI_CLK>, - <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>; + <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>, + <&rpmhcc RPMH_CXO_CLK>; clock-names = "pipe", "aux", "cfg", "bus_master", "bus_slave", "slave_q2a", - "tbu"; + "tbu", + "ref"; assigned-clocks = <&gcc GCC_PCIE_1_AUX_CLK>; assigned-clock-rates = <19200000>;