Message ID | 20231208091355.1417292-4-sherry.sun@nxp.com |
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PCI: imx6: Add pci host wakeup support
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Commit Message
Sherry Sun
Dec. 8, 2023, 9:13 a.m. UTC
The host wake pin is a standard feature in the PCIe bus specification, so we add this property under PCI dts node to enable the host wake function. Signed-off-by: Sherry Sun <sherry.sun@nxp.com> Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com> --- arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts index f87fa5a948cc..cc9e5e599a33 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts @@ -542,6 +542,7 @@ &pcie { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pcie0>; reset-gpio = <&gpio2 7 GPIO_ACTIVE_LOW>; + host-wake-gpio = <&gpio5 21 GPIO_ACTIVE_LOW>; vpcie-supply = <®_pcie0>; status = "okay"; }; @@ -772,6 +773,7 @@ pinctrl_pcie0: pcie0grp { fsl,pins = < MX8MP_IOMUXC_I2C4_SCL__PCIE_CLKREQ_B 0x60 /* open drain, pull up */ MX8MP_IOMUXC_SD1_DATA5__GPIO2_IO07 0x40 + MX8MP_IOMUXC_I2C4_SDA__GPIO5_IO21 0x1c4 >; };