[v5,04/10] drm: bridge: samsung-dsim: complete the CLKLANE_STOP setting

Message ID 20231207141723.108004-5-dario.binacchi@amarulasolutions.com
State New
Headers
Series Add displays support for bsh-smm-s2/pro boards |

Commit Message

Dario Binacchi Dec. 7, 2023, 2:16 p.m. UTC
  The patch completes the setting of CLKLANE_STOP for the imx8mn and imx8mp
platforms (i. e. not exynos).

Co-developed-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
---

(no changes since v1)

 drivers/gpu/drm/bridge/samsung-dsim.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)
  

Comments

Frieder Schrempf Dec. 7, 2023, 4:58 p.m. UTC | #1
On 07.12.23 15:16, Dario Binacchi wrote:
> The patch completes the setting of CLKLANE_STOP for the imx8mn and imx8mp
> platforms (i. e. not exynos).

This also affects i.MX8MM, so better just mention i.MX in general in the
commit message.

> 
> Co-developed-by: Michael Trimarchi <michael@amarulasolutions.com>
> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
> ---
> 
> (no changes since v1)
> 
>  drivers/gpu/drm/bridge/samsung-dsim.c | 7 ++++++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c
> index 15bf05b2bbe4..13f181c99d7e 100644
> --- a/drivers/gpu/drm/bridge/samsung-dsim.c
> +++ b/drivers/gpu/drm/bridge/samsung-dsim.c
> @@ -96,6 +96,7 @@
>  #define DSIM_MFLUSH_VS			BIT(29)
>  /* This flag is valid only for exynos3250/3472/5260/5430 */
>  #define DSIM_CLKLANE_STOP		BIT(30)
> +#define DSIM_NON_CONTINUOUS_CLKLANE	BIT(31)
>  
>  /* DSIM_ESCMODE */
>  #define DSIM_TX_TRIGGER_RST		BIT(4)
> @@ -945,8 +946,12 @@ static int samsung_dsim_init_link(struct samsung_dsim *dsi)
>  	 * power consumption.
>  	 */
>  	if (driver_data->has_clklane_stop &&
> -	    dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS)
> +	    dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) {
> +		if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type))
> +			reg |= DSIM_NON_CONTINUOUS_CLKLANE;
> +
>  		reg |= DSIM_CLKLANE_STOP;
> +	}

I really wonder what the difference between DSIM_NON_CONTINUOUS_CLKLANE
and DSIM_CLKLANE_STOP is.

If Exynos only has the latter, it's pretty clear what to use. But as
i.MX has both of these bits, should both be set? Or is setting
DSIM_NON_CONTINUOUS_CLKLANE enough and we should leave DSIM_CLKLANE_STOP
alone?

Maybe someone has a clue here. The description of the bits in the RM is:

DSIM_NON_CONTINUOUS_CLKLANE - Non-continuous clock mode
DSIM_CLKLANE_STOP -  PHY clock lane On/Off for ESD

>  	samsung_dsim_write(dsi, DSIM_CONFIG_REG, reg);
>  
>  	lanes_mask = BIT(dsi->lanes) - 1;
  
Michael Nazzareno Trimarchi Dec. 8, 2023, 8:34 a.m. UTC | #2
Hi Frieder

On Thu, Dec 7, 2023 at 5:58 PM Frieder Schrempf
<frieder.schrempf@kontron.de> wrote:
>
> On 07.12.23 15:16, Dario Binacchi wrote:
> > The patch completes the setting of CLKLANE_STOP for the imx8mn and imx8mp
> > platforms (i. e. not exynos).
>
> This also affects i.MX8MM, so better just mention i.MX in general in the
> commit message.
>
> >
> > Co-developed-by: Michael Trimarchi <michael@amarulasolutions.com>
> > Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> > Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
> > ---
> >
> > (no changes since v1)
> >
> >  drivers/gpu/drm/bridge/samsung-dsim.c | 7 ++++++-
> >  1 file changed, 6 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c
> > index 15bf05b2bbe4..13f181c99d7e 100644
> > --- a/drivers/gpu/drm/bridge/samsung-dsim.c
> > +++ b/drivers/gpu/drm/bridge/samsung-dsim.c
> > @@ -96,6 +96,7 @@
> >  #define DSIM_MFLUSH_VS                       BIT(29)
> >  /* This flag is valid only for exynos3250/3472/5260/5430 */
> >  #define DSIM_CLKLANE_STOP            BIT(30)
> > +#define DSIM_NON_CONTINUOUS_CLKLANE  BIT(31)
> >
> >  /* DSIM_ESCMODE */
> >  #define DSIM_TX_TRIGGER_RST          BIT(4)
> > @@ -945,8 +946,12 @@ static int samsung_dsim_init_link(struct samsung_dsim *dsi)
> >        * power consumption.
> >        */
> >       if (driver_data->has_clklane_stop &&
> > -         dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS)
> > +         dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) {
> > +             if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type))
> > +                     reg |= DSIM_NON_CONTINUOUS_CLKLANE;
> > +
> >               reg |= DSIM_CLKLANE_STOP;
> > +     }
>
> I really wonder what the difference between DSIM_NON_CONTINUOUS_CLKLANE
> and DSIM_CLKLANE_STOP is.
>
> If Exynos only has the latter, it's pretty clear what to use. But as
> i.MX has both of these bits, should both be set? Or is setting
> DSIM_NON_CONTINUOUS_CLKLANE enough and we should leave DSIM_CLKLANE_STOP
> alone?
>

We add the DSIM_NON_CONTINUOUS_CLKLANE because there was a similar
commit in NXP bsp.
Now according to the datasheet the DSIM_NON_CONTINUOUS_CLKLANE should
be the right bit.

NXP guys should clarify then a bit

Michael

> Maybe someone has a clue here. The description of the bits in the RM is:
>
> DSIM_NON_CONTINUOUS_CLKLANE - Non-continuous clock mode
> DSIM_CLKLANE_STOP -  PHY clock lane On/Off for ESD
>
> >       samsung_dsim_write(dsi, DSIM_CONFIG_REG, reg);
> >
> >       lanes_mask = BIT(dsi->lanes) - 1;
  

Patch

diff --git a/drivers/gpu/drm/bridge/samsung-dsim.c b/drivers/gpu/drm/bridge/samsung-dsim.c
index 15bf05b2bbe4..13f181c99d7e 100644
--- a/drivers/gpu/drm/bridge/samsung-dsim.c
+++ b/drivers/gpu/drm/bridge/samsung-dsim.c
@@ -96,6 +96,7 @@ 
 #define DSIM_MFLUSH_VS			BIT(29)
 /* This flag is valid only for exynos3250/3472/5260/5430 */
 #define DSIM_CLKLANE_STOP		BIT(30)
+#define DSIM_NON_CONTINUOUS_CLKLANE	BIT(31)
 
 /* DSIM_ESCMODE */
 #define DSIM_TX_TRIGGER_RST		BIT(4)
@@ -945,8 +946,12 @@  static int samsung_dsim_init_link(struct samsung_dsim *dsi)
 	 * power consumption.
 	 */
 	if (driver_data->has_clklane_stop &&
-	    dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS)
+	    dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) {
+		if (!samsung_dsim_hw_is_exynos(dsi->plat_data->hw_type))
+			reg |= DSIM_NON_CONTINUOUS_CLKLANE;
+
 		reg |= DSIM_CLKLANE_STOP;
+	}
 	samsung_dsim_write(dsi, DSIM_CONFIG_REG, reg);
 
 	lanes_mask = BIT(dsi->lanes) - 1;