[7/7] ASoC: amd: acp: Set bclk as source to set pll for rt5682s codec

Message ID 20231206110620.1695591-7-venkataprasad.potturu@amd.com
State New
Headers
Series [1/7] ASoC: amd: Add new dmi entries for acp5x platform |

Commit Message

Venkata Prasad Potturu Dec. 6, 2023, 11:06 a.m. UTC
  Some platforms doesn't have reference mclk pin to codec,
so set bclk as a clk source for rt5682s codec pll in tdm mode.

Signed-off-by: Venkata Prasad Potturu <venkataprasad.potturu@amd.com>
---
 sound/soc/amd/acp/acp-mach-common.c | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)
  

Patch

diff --git a/sound/soc/amd/acp/acp-mach-common.c b/sound/soc/amd/acp/acp-mach-common.c
index b72beb8e9b13..74e83c2dae53 100644
--- a/sound/soc/amd/acp/acp-mach-common.c
+++ b/sound/soc/amd/acp/acp-mach-common.c
@@ -464,6 +464,22 @@  static int acp_card_rt5682s_hw_params(struct snd_pcm_substream *substream,
 		return ret;
 	}
 
+	if (drvdata->tdm_mode) {
+		ret = snd_soc_dai_set_pll(codec_dai, RT5682S_PLL1, RT5682S_PLL_S_BCLK1,
+					  6144000, 49152000);
+		if (ret < 0) {
+			dev_err(rtd->dev, "Failed to set codec PLL: %d\n", ret);
+			return ret;
+		}
+
+		ret = snd_soc_dai_set_sysclk(codec_dai, RT5682S_SCLK_S_PLL1,
+					     49152000, SND_SOC_CLOCK_IN);
+		if (ret < 0) {
+			dev_err(rtd->dev, "Failed to set codec SYSCLK: %d\n", ret);
+			return ret;
+		}
+	}
+
 	/* Set tdm/i2s1 master bclk ratio */
 	ret = snd_soc_dai_set_bclk_ratio(codec_dai, ch * format);
 	if (ret < 0) {