diff mbox series

[v8,2/4] riscv: dts: thead: Add TH1520 mmc controllers and sdhci clock

Message ID 20231206-th1520_mmc_dts-v8-2-69220e373e8f@baylibre.com
State New
Headers
Series RISC-V: Add MMC support for TH1520 boards |

Commit Message

Drew Fustini Dec. 6, 2023, 8:09 a.m. UTC 
  Add node for the fixed reference clock used for emmc and sdio nodes.
Add emmc node for the 1st dwcmshc instance which is typically connected
to an eMMC device. Add sdio0 node for the 2nd dwcmshc instance which is
typically connected to microSD slot. Add sdio1 node for the 3rd dwcmshc
instance which is typically connected to an SDIO WiFi module. The node
names are based on Table 1-2 C910/C906 memory map in the TH1520 System
User Manual.

Link: https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/docs
Signed-off-by: Drew Fustini <dfustini@baylibre.com>
---
 arch/riscv/boot/dts/thead/th1520.dtsi | 34 ++++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)

Comments

Emil Renner Berthing Dec. 6, 2023, 10:10 a.m. UTC | #1 
Drew Fustini wrote:
> Add node for the fixed reference clock used for emmc and sdio nodes.
> Add emmc node for the 1st dwcmshc instance which is typically connected
> to an eMMC device. Add sdio0 node for the 2nd dwcmshc instance which is
> typically connected to microSD slot. Add sdio1 node for the 3rd dwcmshc
> instance which is typically connected to an SDIO WiFi module. The node
> names are based on Table 1-2 C910/C906 memory map in the TH1520 System
> User Manual.
>
> Link: https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/docs
> Signed-off-by: Drew Fustini <dfustini@baylibre.com>

Thanks! The rest of the patches look good too, but I don't really have
a schematic
to do proper review.

Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>

> ---
>  arch/riscv/boot/dts/thead/th1520.dtsi | 34 ++++++++++++++++++++++++++++++++++
>  1 file changed, 34 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
> index ba4d2c673ac8..8b915e206f3a 100644
> --- a/arch/riscv/boot/dts/thead/th1520.dtsi
> +++ b/arch/riscv/boot/dts/thead/th1520.dtsi
> @@ -146,6 +146,13 @@ uart_sclk: uart-sclk-clock {
>  		#clock-cells = <0>;
>  	};
>
> +	sdhci_clk: sdhci-clock {
> +		compatible = "fixed-clock";
> +		clock-frequency = <198000000>;
> +		clock-output-names = "sdhci_clk";
> +		#clock-cells = <0>;
> +	};
> +
>  	soc {
>  		compatible = "simple-bus";
>  		interrupt-parent = <&plic>;
> @@ -304,6 +311,33 @@ dmac0: dma-controller@ffefc00000 {
>  			status = "disabled";
>  		};
>
> +		emmc: mmc@ffe7080000 {
> +			compatible = "thead,th1520-dwcmshc";
> +			reg = <0xff 0xe7080000 0x0 0x10000>;
> +			interrupts = <62 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&sdhci_clk>;
> +			clock-names = "core";
> +			status = "disabled";
> +		};
> +
> +		sdio0: mmc@ffe7090000 {
> +			compatible = "thead,th1520-dwcmshc";
> +			reg = <0xff 0xe7090000 0x0 0x10000>;
> +			interrupts = <64 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&sdhci_clk>;
> +			clock-names = "core";
> +			status = "disabled";
> +		};
> +
> +		sdio1: mmc@ffe70a0000 {
> +			compatible = "thead,th1520-dwcmshc";
> +			reg = <0xff 0xe70a0000 0x0 0x10000>;
> +			interrupts = <71 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&sdhci_clk>;
> +			clock-names = "core";
> +			status = "disabled";
> +		};
> +
>  		timer0: timer@ffefc32000 {
>  			compatible = "snps,dw-apb-timer";
>  			reg = <0xff 0xefc32000 0x0 0x14>;
>
> --
> 2.34.1
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
Drew Fustini Dec. 7, 2023, 6:33 a.m. UTC | #2 
On Wed, Dec 06, 2023 at 04:10:28AM -0600, Emil Renner Berthing wrote:
> Drew Fustini wrote:
> > Add node for the fixed reference clock used for emmc and sdio nodes.
> > Add emmc node for the 1st dwcmshc instance which is typically connected
> > to an eMMC device. Add sdio0 node for the 2nd dwcmshc instance which is
> > typically connected to microSD slot. Add sdio1 node for the 3rd dwcmshc
> > instance which is typically connected to an SDIO WiFi module. The node
> > names are based on Table 1-2 C910/C906 memory map in the TH1520 System
> > User Manual.
> >
> > Link: https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/docs
> > Signed-off-by: Drew Fustini <dfustini@baylibre.com>
> 
> Thanks! The rest of the patches look good too, but I don't really have
> a schematic
> to do proper review.
> 
> Reviewed-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>

Thanks for reviewing. The BeagleV-Ahead board is open source hardware so
there is the full schematic and PCB layout in:
https://git.beagleboard.org/beaglev-ahead/beaglev-ahead

Drew
Guo Ren Dec. 7, 2023, 8:23 a.m. UTC | #3 
On Wed, Dec 6, 2023 at 4:09 PM Drew Fustini <dfustini@baylibre.com> wrote:
>
> Add node for the fixed reference clock used for emmc and sdio nodes.
> Add emmc node for the 1st dwcmshc instance which is typically connected
> to an eMMC device. Add sdio0 node for the 2nd dwcmshc instance which is
> typically connected to microSD slot. Add sdio1 node for the 3rd dwcmshc
> instance which is typically connected to an SDIO WiFi module. The node
> names are based on Table 1-2 C910/C906 memory map in the TH1520 System
> User Manual.
>
> Link: https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/docs
> Signed-off-by: Drew Fustini <dfustini@baylibre.com>
> ---
>  arch/riscv/boot/dts/thead/th1520.dtsi | 34 ++++++++++++++++++++++++++++++++++
>  1 file changed, 34 insertions(+)
>
> diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
> index ba4d2c673ac8..8b915e206f3a 100644
> --- a/arch/riscv/boot/dts/thead/th1520.dtsi
> +++ b/arch/riscv/boot/dts/thead/th1520.dtsi
> @@ -146,6 +146,13 @@ uart_sclk: uart-sclk-clock {
>                 #clock-cells = <0>;
>         };
>
> +       sdhci_clk: sdhci-clock {
> +               compatible = "fixed-clock";
> +               clock-frequency = <198000000>;
> +               clock-output-names = "sdhci_clk";
> +               #clock-cells = <0>;
> +       };
> +
>         soc {
>                 compatible = "simple-bus";
>                 interrupt-parent = <&plic>;
> @@ -304,6 +311,33 @@ dmac0: dma-controller@ffefc00000 {
>                         status = "disabled";
>                 };
>
> +               emmc: mmc@ffe7080000 {
> +                       compatible = "thead,th1520-dwcmshc";
> +                       reg = <0xff 0xe7080000 0x0 0x10000>;
> +                       interrupts = <62 IRQ_TYPE_LEVEL_HIGH>;
> +                       clocks = <&sdhci_clk>;
> +                       clock-names = "core";
> +                       status = "disabled";
> +               };
> +
> +               sdio0: mmc@ffe7090000 {
> +                       compatible = "thead,th1520-dwcmshc";
> +                       reg = <0xff 0xe7090000 0x0 0x10000>;
> +                       interrupts = <64 IRQ_TYPE_LEVEL_HIGH>;
> +                       clocks = <&sdhci_clk>;
> +                       clock-names = "core";
> +                       status = "disabled";
> +               };
> +
> +               sdio1: mmc@ffe70a0000 {
> +                       compatible = "thead,th1520-dwcmshc";
> +                       reg = <0xff 0xe70a0000 0x0 0x10000>;
> +                       interrupts = <71 IRQ_TYPE_LEVEL_HIGH>;
> +                       clocks = <&sdhci_clk>;
> +                       clock-names = "core";
> +                       status = "disabled";
> +               };
> +
>                 timer0: timer@ffefc32000 {
>                         compatible = "snps,dw-apb-timer";
>                         reg = <0xff 0xefc32000 0x0 0x14>;
>
> --
> 2.34.1
>
Reviewed-by: Guo Ren <guoren@kernel.org>
diff mbox series

Patch

diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
index ba4d2c673ac8..8b915e206f3a 100644
--- a/arch/riscv/boot/dts/thead/th1520.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520.dtsi
@@ -146,6 +146,13 @@  uart_sclk: uart-sclk-clock {
 		#clock-cells = <0>;
 	};
 
+	sdhci_clk: sdhci-clock {
+		compatible = "fixed-clock";
+		clock-frequency = <198000000>;
+		clock-output-names = "sdhci_clk";
+		#clock-cells = <0>;
+	};
+
 	soc {
 		compatible = "simple-bus";
 		interrupt-parent = <&plic>;
@@ -304,6 +311,33 @@  dmac0: dma-controller@ffefc00000 {
 			status = "disabled";
 		};
 
+		emmc: mmc@ffe7080000 {
+			compatible = "thead,th1520-dwcmshc";
+			reg = <0xff 0xe7080000 0x0 0x10000>;
+			interrupts = <62 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&sdhci_clk>;
+			clock-names = "core";
+			status = "disabled";
+		};
+
+		sdio0: mmc@ffe7090000 {
+			compatible = "thead,th1520-dwcmshc";
+			reg = <0xff 0xe7090000 0x0 0x10000>;
+			interrupts = <64 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&sdhci_clk>;
+			clock-names = "core";
+			status = "disabled";
+		};
+
+		sdio1: mmc@ffe70a0000 {
+			compatible = "thead,th1520-dwcmshc";
+			reg = <0xff 0xe70a0000 0x0 0x10000>;
+			interrupts = <71 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&sdhci_clk>;
+			clock-names = "core";
+			status = "disabled";
+		};
+
 		timer0: timer@ffefc32000 {
 			compatible = "snps,dw-apb-timer";
 			reg = <0xff 0xefc32000 0x0 0x14>;