arm64: dts: imx8mm-venice-gw7: Fix pci sub-nodes

Message ID 20231205182241.2550284-1-tharvey@gateworks.com
State New
Headers
Series arm64: dts: imx8mm-venice-gw7: Fix pci sub-nodes |

Commit Message

Tim Harvey Dec. 5, 2023, 6:22 p.m. UTC
  Several schema warnings were fixed in commit
d61c5068729a ("arm64: dts: imx8mm-venice-gw7: Fix pci sub-nodes")
however the node names and the ethernet NIC node were not quite correct.

Fix the node names as the ethernet device should have a node name of
'ethernet' and remove the device_type, #address-cells, #size-cells, and
ranges properties that should only be on busses/bridges.

Fixes: d61c5068729a ("arm64: dts: imx8mm-venice-gw7: Fix pci sub-nodes")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
---
 .../dts/freescale/imx8mm-venice-gw72xx.dtsi    | 18 +++++++-----------
 .../dts/freescale/imx8mm-venice-gw73xx.dtsi    | 18 +++++++-----------
 .../dts/freescale/imx8mm-venice-gw7902.dts     | 10 +++-------
 3 files changed, 17 insertions(+), 29 deletions(-)
  

Comments

Fabio Estevam Dec. 5, 2023, 6:57 p.m. UTC | #1
Hi Tim,

On Tue, Dec 5, 2023 at 3:22 PM Tim Harvey <tharvey@gateworks.com> wrote:
>
> Several schema warnings were fixed in commit
> d61c5068729a ("arm64: dts: imx8mm-venice-gw7: Fix pci sub-nodes")
> however the node names and the ethernet NIC node were not quite correct.
>
> Fix the node names as the ethernet device should have a node name of
> 'ethernet' and remove the device_type, #address-cells, #size-cells, and
> ranges properties that should only be on busses/bridges.

I sent this one to address the remaining issues:

https://lore.kernel.org/linux-devicetree/20231130225242.988336-1-festevam@gmail.com/
  

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi
index a337e8f20441..31f16f7cf37c 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw72xx.dtsi
@@ -157,33 +157,29 @@  &pcie0 {
 				 <&clk IMX8MM_SYS_PLL2_250M>;
 	status = "okay";
 
-	pcie@0,0 {
-		reg = <0x0000 0 0 0 0>;
+	pcie@0 {
 		device_type = "pci";
+		reg = <0x0000 0 0 0 0>;
 		#address-cells = <3>;
 		#size-cells = <2>;
 		ranges;
 
-		pcie@0,0 {
-			reg = <0x0000 0 0 0 0>;
+		pcie@0 {
 			device_type = "pci";
+			reg = <0x0000 0 0 0 0>;
 			#address-cells = <3>;
 			#size-cells = <2>;
 			ranges;
 
-			pcie@3,0 {
-				reg = <0x1800 0 0 0 0>;
+			pcie@3 {
 				device_type = "pci";
+				reg = <0x1800 0 0 0 0>;
 				#address-cells = <3>;
 				#size-cells = <2>;
 				ranges;
 
-				eth1: pcie@0,0 {
+				eth1: ethernet@0 {
 					reg = <0x0000 0 0 0 0>;
-					device_type = "pci";
-					#address-cells = <3>;
-					#size-cells = <2>;
-					ranges;
 
 					local-mac-address = [00 00 00 00 00 00];
 				};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi
index 2247d1c4e2af..6f5a6d91c95e 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw73xx.dtsi
@@ -177,33 +177,29 @@  &pcie0 {
 				 <&clk IMX8MM_SYS_PLL2_250M>;
 	status = "okay";
 
-	pcie@0,0 {
-		reg = <0x0000 0 0 0 0>;
+	pcie@0 {
 		device_type = "pci";
+		reg = <0x0000 0 0 0 0>;
 		#address-cells = <3>;
 		#size-cells = <2>;
 		ranges;
 
-		pcie@0,0 {
-			reg = <0x0000 0 0 0 0>;
+		pcie@0 {
 			device_type = "pci";
+			reg = <0x0000 0 0 0 0>;
 			#address-cells = <3>;
 			#size-cells = <2>;
 			ranges;
 
-			pcie@4,0 {
-				reg = <0x2000 0 0 0 0>;
+			pcie@4 {
 				device_type = "pci";
+				reg = <0x2000 0 0 0 0>;
 				#address-cells = <3>;
 				#size-cells = <2>;
 				ranges;
 
-				eth1: pcie@0,0 {
+				eth1: ethernet@0 {
 					reg = <0x0000 0 0 0 0>;
-					device_type = "pci";
-					#address-cells = <3>;
-					#size-cells = <2>;
-					ranges;
 
 					local-mac-address = [00 00 00 00 00 00];
 				};
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
index 7ef17c2b0e9d..4bb22fdc5d2e 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw7902.dts
@@ -633,19 +633,15 @@  &pcie0 {
 				 <&clk IMX8MM_SYS_PLL2_250M>;
 	status = "okay";
 
-	pcie@0,0 {
-		reg = <0x0000 0 0 0 0>;
+	pcie@0 {
 		device_type = "pci";
+		reg = <0x0000 0 0 0 0>;
 		#address-cells = <3>;
 		#size-cells = <2>;
 		ranges;
 
-		eth1: pcie@0,0 {
+		eth1: ethernet@0 {
 			reg = <0x0000 0 0 0 0>;
-			device_type = "pci";
-			#address-cells = <3>;
-			#size-cells = <2>;
-			ranges;
 
 			local-mac-address = [00 00 00 00 00 00];
 		};