Message ID | 20231205-qcom_stats-aeabi_uldivmod-fix-v1-1-f94ecec5e894@quicinc.com |
---|---|
State | New |
Headers |
Return-Path: <linux-kernel-owner@vger.kernel.org> Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:bcd1:0:b0:403:3b70:6f57 with SMTP id r17csp3800058vqy; Tue, 5 Dec 2023 16:44:54 -0800 (PST) X-Google-Smtp-Source: AGHT+IEFw8yE97oyjPoneOflv/Q387UN+nVrAqF6PF41Ae+7ClEr5J3j9/AHdx2jObuY+rl/7aj7 X-Received: by 2002:a05:6a20:8f24:b0:18b:4dc2:a4c7 with SMTP id b36-20020a056a208f2400b0018b4dc2a4c7mr65180pzk.14.1701823494153; Tue, 05 Dec 2023 16:44:54 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1701823494; cv=none; d=google.com; s=arc-20160816; b=XTcX2nuDrrQBZVuQt+aC0CUk7vfyAD2ScIToU6urOnoOuksk/18S2iKQFm1gX9b8zI whVFjJBAl5lJ0W6IEecrXlgQ4CBSmgmHUT8MRGmt/It70P05qqJ74bFgnidnqmMAQ77n 65qkLm0z8LWstjKqgtXBrQr1W1exH/AkLvVQb/Rpjgwnt71hvOgUX+m7qkpQWtjJ/Wng i2kIEE7xVLeEgcbdkIRGJqoiFCkMX3a02RK0uKBvw8613AolyNrR2xLMybXWsdDIxCse VBxXtRotEicMk/+Guf3rFcHQGa8fDpRMMWdTuZe6Ft9Ejm8vIDH1e2RN5ZywrJ0GoAtD gMPw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:cc:to:message-id:content-transfer-encoding :mime-version:subject:date:from:dkim-signature; bh=87jbUFzThwGJXWiffU7Oty1HvYyVTLcQP7Ibmo8JnIg=; fh=oxmeidMndhlJ2h6ZRYMpHP+mxpQjx2A1eOPM9WeUx/E=; b=NUPp2WB1fQ4TCqa2RGF7cbZ+cA7ryNWi1sFTu66LbsggSRlUO3RtBHq8MWBMPNzEOc jjx7Zvhz7W+wLbOvIvSwbB7vU7t2FzL9Kp/PrsVy98mro7Tox15morzXPQjdFHCMRiDW oX9HqkJUbSlbYM3+OciWxfpiLXYAtFC/k/8eA6la2djxaeA6rbxX65t2QQQXjjdio8tb wjeWHDKqfroVmgLet9QdkaoGi6+TL03V0hmPC8GB5072IqWOCRnOBWjEgHJsxU2hBvdL 6+WKAc9yGw4MjSpEiNEuZR3PiqrNN8iVDMRoi3p2rk0/yxTN8SZEtKQf5MhG/u0vkDcl fKng== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=SY4tnd7R; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:1 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from morse.vger.email (morse.vger.email. [2620:137:e000::3:1]) by mx.google.com with ESMTPS id n1-20020a63ee41000000b005acf0458523si10286325pgk.612.2023.12.05.16.44.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 05 Dec 2023 16:44:54 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:1 as permitted sender) client-ip=2620:137:e000::3:1; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcppdkim1 header.b=SY4tnd7R; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:1 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by morse.vger.email (Postfix) with ESMTP id 89D8E82072F9; Tue, 5 Dec 2023 16:44:51 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at morse.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1376312AbjLFAof (ORCPT <rfc822;chrisfriedt@gmail.com> + 99 others); Tue, 5 Dec 2023 19:44:35 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42562 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1376296AbjLFAoe (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Tue, 5 Dec 2023 19:44:34 -0500 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D34B3C6; Tue, 5 Dec 2023 16:44:40 -0800 (PST) Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3B60PoEr010483; Wed, 6 Dec 2023 00:44:30 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : date : subject : mime-version : content-type : content-transfer-encoding : message-id : to : cc; s=qcppdkim1; bh=87jbUFzThwGJXWiffU7Oty1HvYyVTLcQP7Ibmo8JnIg=; b=SY4tnd7RM/4LsrYMhvNVPlFrRNFQOPJDjMXX144qKDF7knknvGxg4OHHvZftjR+xriBD M2gMt6jfFA0F0wZWCLLmYgRg7XLn60CJwogIm1tCx3rm5l5LDynmOLIDvLlWJ2mI09H0 hmYXJVsbQD6DND5SqUjMLQXs5+IOpeGB6sNeq7mBP6+qnYAcQanEelACVoBfkS20JDs3 iP+jdf10rVsvxT9xSCUSS+5hglOzH0bWgYRTPpDyqUUW4kw7ooG3gkrv9zNUjBs0P3Fv BLLnPNYkE+IIyaIj4tNIq+K5zBRDHupb4aoBOn7NOoleXAsa487M8TQiDiDEfyQPX5Oj JA== Received: from nalasppmta05.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3utd1n05ea-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 06 Dec 2023 00:44:30 +0000 Received: from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com [10.47.97.35]) by NALASPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 3B60iTrp005074 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 6 Dec 2023 00:44:29 GMT Received: from [169.254.0.1] (10.49.16.6) by nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Tue, 5 Dec 2023 16:44:28 -0800 From: Bjorn Andersson <quic_bjorande@quicinc.com> Date: Tue, 5 Dec 2023 16:44:10 -0800 Subject: [PATCH] soc: qcom: stats: Fix division issue on 32-bit platforms MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-ID: <20231205-qcom_stats-aeabi_uldivmod-fix-v1-1-f94ecec5e894@quicinc.com> X-B4-Tracking: v=1; b=H4sIANnDb2UC/x2NSwrDMAwFrxK8rsCO+4FepZQg20ojcOzWSkIh5 O4VXc7wmLcbocYk5t7tptHGwrUouFNn4oTlRcBJ2fS29663F/jEOg+y4CKAhIGHNSfe5ppg5C+ c8erjjaJ1fjTaCCgEoWGJk1bKmrPKdyPd/k8fz+P4ATdGgimEAAAA To: Andy Gross <agross@kernel.org>, Bjorn Andersson <andersson@kernel.org>, Konrad Dybcio <konrad.dybcio@linaro.org> CC: <linux-arm-msm@vger.kernel.org>, <linux-kernel@vger.kernel.org>, "Randy Dunlap" <rdunlap@infradead.org>, Bjorn Andersson <quic_bjorande@quicinc.com> X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1701823468; l=1322; i=quic_bjorande@quicinc.com; s=20230915; h=from:subject:message-id; bh=UdUckErCZF5X1TrIpq2q7COv//JN2FUDfefIC2xiIQ0=; b=cjrS0PFKoNOIG6fmYxUb/5233qkj0TkItCxzEQ/HFZGGUqrL3X4hiTkn9p3dX0e6HYCZ2S0EgHDy YphlV5xgBBsvyvWaP1UV8VKUWBHoB0mfeKmd4PBgZNbYbg7D7b2b X-Developer-Key: i=quic_bjorande@quicinc.com; a=ed25519; pk=VkhObtljigy9k0ZUIE1Mvr0Y+E1dgBEH9WoLQnUtbIM= X-Originating-IP: [10.49.16.6] X-ClientProxiedBy: nalasex01b.na.qualcomm.com (10.47.209.197) To nalasex01c.na.qualcomm.com (10.47.97.35) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: xVwfdZAQcMN8EW07y9od54m-11ORxq5P X-Proofpoint-GUID: xVwfdZAQcMN8EW07y9od54m-11ORxq5P X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-05_20,2023-12-05_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 lowpriorityscore=0 suspectscore=0 clxscore=1011 impostorscore=0 priorityscore=1501 adultscore=0 bulkscore=0 mlxscore=0 mlxlogscore=999 phishscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2311290000 definitions=main-2312060002 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on morse.vger.email Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (morse.vger.email [0.0.0.0]); Tue, 05 Dec 2023 16:44:51 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1784491272019555000 X-GMAIL-MSGID: 1784491272019555000 |
Series |
soc: qcom: stats: Fix division issue on 32-bit platforms
|
|
Commit Message
Bjorn Andersson
Dec. 6, 2023, 12:44 a.m. UTC
commit 'e84e61bdb97c ("soc: qcom: stats: Add DDR sleep stats")' made it
in with a mult_frac() which causes link errors on Arm and PowerPC
builds:
ERROR: modpost: "__aeabi_uldivmod" [drivers/soc/qcom/qcom_stats.ko] undefined!
Expand the mult_frac() to avoid this problem.
Fixes: e84e61bdb97c ("soc: qcom: stats: Add DDR sleep stats")
Reported-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
---
drivers/soc/qcom/qcom_stats.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
---
base-commit: adcad44bd1c73a5264bff525e334e2f6fc01bb9b
change-id: 20231205-qcom_stats-aeabi_uldivmod-fix-4a63c7ec013f
Best regards,
Comments
On 12/5/23 16:44, Bjorn Andersson wrote: > commit 'e84e61bdb97c ("soc: qcom: stats: Add DDR sleep stats")' made it > in with a mult_frac() which causes link errors on Arm and PowerPC > builds: > > ERROR: modpost: "__aeabi_uldivmod" [drivers/soc/qcom/qcom_stats.ko] undefined! > > Expand the mult_frac() to avoid this problem. > > Fixes: e84e61bdb97c ("soc: qcom: stats: Add DDR sleep stats") > Reported-by: Randy Dunlap <rdunlap@infradead.org> > Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> That works. Thanks. Acked-by: Randy Dunlap <rdunlap@infradead.org> Tested-by: Randy Dunlap <rdunlap@infradead.org> # build-tested > --- > drivers/soc/qcom/qcom_stats.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/soc/qcom/qcom_stats.c b/drivers/soc/qcom/qcom_stats.c > index 4763d62a8cb0..5ba61232313e 100644 > --- a/drivers/soc/qcom/qcom_stats.c > +++ b/drivers/soc/qcom/qcom_stats.c > @@ -221,7 +221,8 @@ static int qcom_ddr_stats_show(struct seq_file *s, void *unused) > > for (i = 0; i < ddr.entry_count; i++) { > /* Convert the period to ms */ > - entry[i].dur = mult_frac(MSEC_PER_SEC, entry[i].dur, ARCH_TIMER_FREQ); > + entry[i].dur *= MSEC_PER_SEC; > + entry[i].dur = div_u64(entry[i].dur, ARCH_TIMER_FREQ); > } > > for (i = 0; i < ddr.entry_count; i++) > > --- > base-commit: adcad44bd1c73a5264bff525e334e2f6fc01bb9b > change-id: 20231205-qcom_stats-aeabi_uldivmod-fix-4a63c7ec013f > > Best regards,
On 12/6/23 01:44, Bjorn Andersson wrote: > commit 'e84e61bdb97c ("soc: qcom: stats: Add DDR sleep stats")' made it > in with a mult_frac() which causes link errors on Arm and PowerPC > builds: > > ERROR: modpost: "__aeabi_uldivmod" [drivers/soc/qcom/qcom_stats.ko] undefined! > > Expand the mult_frac() to avoid this problem. > > Fixes: e84e61bdb97c ("soc: qcom: stats: Add DDR sleep stats") > Reported-by: Randy Dunlap <rdunlap@infradead.org> > Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> > --- Thanks, I keep believeing mult_frac is generic enough to work on something else than arm64.. Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad
From: Bjorn Andersson > Sent: 06 December 2023 00:44 > > commit 'e84e61bdb97c ("soc: qcom: stats: Add DDR sleep stats")' made it > in with a mult_frac() which causes link errors on Arm and PowerPC > builds: > > ERROR: modpost: "__aeabi_uldivmod" [drivers/soc/qcom/qcom_stats.ko] undefined! > > Expand the mult_frac() to avoid this problem. > > Fixes: e84e61bdb97c ("soc: qcom: stats: Add DDR sleep stats") > Reported-by: Randy Dunlap <rdunlap@infradead.org> > Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> > --- > drivers/soc/qcom/qcom_stats.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/soc/qcom/qcom_stats.c b/drivers/soc/qcom/qcom_stats.c > index 4763d62a8cb0..5ba61232313e 100644 > --- a/drivers/soc/qcom/qcom_stats.c > +++ b/drivers/soc/qcom/qcom_stats.c > @@ -221,7 +221,8 @@ static int qcom_ddr_stats_show(struct seq_file *s, void *unused) > > for (i = 0; i < ddr.entry_count; i++) { > /* Convert the period to ms */ > - entry[i].dur = mult_frac(MSEC_PER_SEC, entry[i].dur, ARCH_TIMER_FREQ); > + entry[i].dur *= MSEC_PER_SEC; > + entry[i].dur = div_u64(entry[i].dur, ARCH_TIMER_FREQ); Is that right? At a guess mult_frac(a, b, c) is doing a 32x32 multiply and then a 64x32 divide to generate a 32bit result. So I'd guess entry[i].dur is 32bit? (this code isn't in -rc4 ...). Which means you are now discarding the high bits. You've also added a very slow 64bit divide. A multiple by reciprocal calculation will be much better. Since absolute accuracy almost certainly doesn't matter here convert: dur * 1000 / FREQ to (dur * (u32)(1000ull << 32 / FREQ)) >> 32 which will be fine provided FREQ >= 1000 David - Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK Registration No: 1397386 (Wales)
On Wed, Dec 06, 2023 at 02:07:16PM +0000, David Laight wrote: > From: Bjorn Andersson > > Sent: 06 December 2023 00:44 > > > > commit 'e84e61bdb97c ("soc: qcom: stats: Add DDR sleep stats")' made it > > in with a mult_frac() which causes link errors on Arm and PowerPC > > builds: > > > > ERROR: modpost: "__aeabi_uldivmod" [drivers/soc/qcom/qcom_stats.ko] undefined! > > > > Expand the mult_frac() to avoid this problem. > > > > Fixes: e84e61bdb97c ("soc: qcom: stats: Add DDR sleep stats") > > Reported-by: Randy Dunlap <rdunlap@infradead.org> > > Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com> > > --- > > drivers/soc/qcom/qcom_stats.c | 3 ++- > > 1 file changed, 2 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/soc/qcom/qcom_stats.c b/drivers/soc/qcom/qcom_stats.c > > index 4763d62a8cb0..5ba61232313e 100644 > > --- a/drivers/soc/qcom/qcom_stats.c > > +++ b/drivers/soc/qcom/qcom_stats.c > > @@ -221,7 +221,8 @@ static int qcom_ddr_stats_show(struct seq_file *s, void *unused) > > > > for (i = 0; i < ddr.entry_count; i++) { > > /* Convert the period to ms */ > > - entry[i].dur = mult_frac(MSEC_PER_SEC, entry[i].dur, ARCH_TIMER_FREQ); > > + entry[i].dur *= MSEC_PER_SEC; > > + entry[i].dur = div_u64(entry[i].dur, ARCH_TIMER_FREQ); > > Is that right? > At a guess mult_frac(a, b, c) is doing a 32x32 multiply and then a 64x32 > divide to generate a 32bit result. > So I'd guess entry[i].dur is 32bit? (this code isn't in -rc4 ...). > Which means you are now discarding the high bits. > entry[i].dur is 64 bit, so this should work just fine. Arnd proposed that as ARCH_TIMER_FREQ is evenly divisible by MSEC_PER_SEC we just div_u64(dur, ARCH_TIMER_FREQ / MSEC_PER_SEC), and I picked that patch instead. > You've also added a very slow 64bit divide. Without checking the generated code, I'd expect this to be a slow 64-bit division already. But this is a debug function, so it should be fine to take that penalty. > A multiple by reciprocal calculation will be much better. > Since absolute accuracy almost certainly doesn't matter here convert: > dur * 1000 / FREQ > to > (dur * (u32)(1000ull << 32 / FREQ)) >> 32 > which will be fine provided FREQ >= 1000 > I'm quite sure you're right regarding the accuracy. I think as this isn't in a hot path, the more readable div_u64() feels like a reasonable choice. Thank you for your input and suggestion though! Regards, Bjorn > David > > - > Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK > Registration No: 1397386 (Wales)
diff --git a/drivers/soc/qcom/qcom_stats.c b/drivers/soc/qcom/qcom_stats.c index 4763d62a8cb0..5ba61232313e 100644 --- a/drivers/soc/qcom/qcom_stats.c +++ b/drivers/soc/qcom/qcom_stats.c @@ -221,7 +221,8 @@ static int qcom_ddr_stats_show(struct seq_file *s, void *unused) for (i = 0; i < ddr.entry_count; i++) { /* Convert the period to ms */ - entry[i].dur = mult_frac(MSEC_PER_SEC, entry[i].dur, ARCH_TIMER_FREQ); + entry[i].dur *= MSEC_PER_SEC; + entry[i].dur = div_u64(entry[i].dur, ARCH_TIMER_FREQ); } for (i = 0; i < ddr.entry_count; i++)