From patchwork Wed Nov 29 16:06:30 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 171464 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:a5a7:0:b0:403:3b70:6f57 with SMTP id d7csp449546vqn; Wed, 29 Nov 2023 08:16:23 -0800 (PST) X-Google-Smtp-Source: AGHT+IHPbVdWqMv0EBNM5jGleU4FxOV2ETU0hc6m+zNnBjG1WF3fFRkn7qs1L4wnECND/YPxNuSW X-Received: by 2002:a05:6870:9a98:b0:1fa:2d7e:f67a with SMTP id hp24-20020a0568709a9800b001fa2d7ef67amr17614194oab.31.1701274582997; Wed, 29 Nov 2023 08:16:22 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1701274582; cv=none; d=google.com; s=arc-20160816; b=Gh4WglshlEWTSVGve8UndGxxQ79TRC9NjRLKHnC+24kqOqzKhMDbp13KbglIWEO7Kn P2KGhwIUjHMY3pVs0c79a3FQ6kkqy61lnMTiPxd4cRlNbUDxsX33O6eZZ6KrdUkRscbj op18b1Aj2I9OoQ31PvpggtVWIK62QuXg+HlqGaHcG2ZXXaHvM+cutJ5qiKw0l6ZCGHYu usiHB/3uCgEb7wbRpobMOPt2fDpLDhoeizwpQEUy6YVwI5eaWB981CN1ibJqlTVFffzB fBtoqdpuIjGIseIBLUty1YPdcvX0HSdFTmqzE7B8WDK8D3MXQ5Cv5IZ3OpUfDtSydcSA AkWQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=jhDb/HHOY9FsCnNlIgyCIkjJpR6gLHDbwVIHtDdGEQ0=; fh=p5qGgOuQ1qdHRKXQ3E7ZkEX+heMqfz4xi8z6J8C0/aQ=; b=nPvc3rCE/Dh9BN79AqjYH6eSv6CZ+rHD9ehFOLkP4NqMKq6G3QfxshYVxq2yOsFbBh z6dkLbbZ7GEOTiycU+HmfpSuayx7uPgEHkJ3p2yPGV/t27TI0DvIb5pSfrEwn6rmud+B A3UFyaHabsknWoxyuAYHC6jPJpTlkdNFKZkvET8GhNLszy3/nai8a9C7cexuAqfVPEkv BHJ/xBbUDe3VF9ZeWywXOBQcAXgsdcTOijViAynVR6TrnQNbnqQ7d/MxhL6n4tcMlriY u945zdvvCbnHQGBhoKxd3jPpUUD1IpagfEv8meiw4u7tKmuMpgChpVEdjj3FCDAECkwe 0FXw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b="XqW/rZHV"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:3 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from lipwig.vger.email (lipwig.vger.email. [2620:137:e000::3:3]) by mx.google.com with ESMTPS id k13-20020a056870148d00b001e9d51b0e56si4259212oab.244.2023.11.29.08.16.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Nov 2023 08:16:22 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:3 as permitted sender) client-ip=2620:137:e000::3:3; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b="XqW/rZHV"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:3 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by lipwig.vger.email (Postfix) with ESMTP id C9FB780A9D6A; Wed, 29 Nov 2023 08:16:16 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at lipwig.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229954AbjK2QPf (ORCPT + 99 others); Wed, 29 Nov 2023 11:15:35 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46324 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232328AbjK2QPR (ORCPT ); Wed, 29 Nov 2023 11:15:17 -0500 Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.151]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A4659D6E; Wed, 29 Nov 2023 08:15:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1701274523; x=1732810523; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=GcznTEzkYh7381dOAmLl/g2Ovk3HvI9vfBlGPtxsvN8=; b=XqW/rZHVMFQ6E+5yugJdElETRW3VdkOVjqetXppBuG5VJgVXVUjyziEP joJ+Yhvd3OUvUImElxnyn2DNkcP8ZT4jwmbwAnUwqVMpKP97SM8UXMKPs V9XZEMH2GQRCFwBeh3eOjtpylAOW6Co3K/ptehwbB8VEhoIVRYBoLdLLo cUsp4YGG56h5NHzYi+WNwE07CEz6xtvYkxyM0vZaZ6nojv60MrvUW364E k5CpiFoRZHILi0bfi5U2jiuLCIE8HweBJ93UOpdckyQaP6H1hGUqAs4eH wakmtGMTiGoZ04rv92HvbV4SqR4lk8TzRByjtOi3Oz73l/EZcJ91Mhfn7 A==; X-IronPort-AV: E=McAfee;i="6600,9927,10909"; a="373372658" X-IronPort-AV: E=Sophos;i="6.04,235,1695711600"; d="scan'208";a="373372658" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 29 Nov 2023 08:15:22 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10909"; a="892498874" X-IronPort-AV: E=Sophos;i="6.04,235,1695711600"; d="scan'208";a="892498874" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga004.jf.intel.com with ESMTP; 29 Nov 2023 08:15:12 -0800 Received: by black.fi.intel.com (Postfix, from userid 1003) id 88ED0535; Wed, 29 Nov 2023 18:15:01 +0200 (EET) From: Andy Shevchenko To: Linus Walleij , Bartosz Golaszewski , Andy Shevchenko , Rasmus Villemoes , =?utf-8?q?Jonathan_Neusch?= =?utf-8?q?=C3=A4fer?= , Krzysztof Kozlowski , =?utf-8?q?Uwe_Kleine-?= =?utf-8?q?K=C3=B6nig?= , Geert Uytterhoeven , Biju Das , Claudiu Beznea , Jianlong Huang , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, openbmc@lists.ozlabs.org, linux-mips@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-renesas-soc@vger.kernel.org Cc: Ray Jui , Scott Branden , Broadcom internal kernel review list , Dong Aisheng , Fabio Estevam , Shawn Guo , Jacky Bai , Pengutronix Kernel Team , Sascha Hauer , NXP Linux Team , Sean Wang , Paul Cercueil , Lakshmi Sowjanya D , Bjorn Andersson , Andy Gross , Konrad Dybcio , Emil Renner Berthing , Hal Feng Subject: [PATCH v4 07/23] pinctrl: equilibrium: Convert to use struct pingroup Date: Wed, 29 Nov 2023 18:06:30 +0200 Message-ID: <20231129161459.1002323-8-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.43.0.rc1.1.gbec44491f096 In-Reply-To: <20231129161459.1002323-1-andriy.shevchenko@linux.intel.com> References: <20231129161459.1002323-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Wed, 29 Nov 2023 08:16:17 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1783915697122626131 X-GMAIL-MSGID: 1783915697122626131 The pin control header provides struct pingroup. Utilize it instead of open coded variants in the driver. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-equilibrium.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/drivers/pinctrl/pinctrl-equilibrium.c b/drivers/pinctrl/pinctrl-equilibrium.c index fd59cfdeefac..4ebae516d1b1 100644 --- a/drivers/pinctrl/pinctrl-equilibrium.c +++ b/drivers/pinctrl/pinctrl-equilibrium.c @@ -705,7 +705,7 @@ static int eqbr_build_groups(struct eqbr_pinctrl_drv_data *drvdata) struct device *dev = drvdata->dev; struct device_node *node = dev->of_node; unsigned int *pins, *pinmux, pin_id, pinmux_id; - struct group_desc group; + struct pingroup group, *grp = &group; struct device_node *np; struct property *prop; int j, err; @@ -721,49 +721,49 @@ static int eqbr_build_groups(struct eqbr_pinctrl_drv_data *drvdata) of_node_put(np); return err; } - group.num_pins = err; - group.name = prop->value; - pins = devm_kcalloc(dev, group.num_pins, sizeof(*pins), GFP_KERNEL); + grp->npins = err; + grp->name = prop->value; + pins = devm_kcalloc(dev, grp->npins, sizeof(*pins), GFP_KERNEL); if (!pins) { of_node_put(np); return -ENOMEM; } - group.pins = pins; + grp->pins = pins; - pinmux = devm_kcalloc(dev, group.num_pins, sizeof(*pinmux), GFP_KERNEL); + pinmux = devm_kcalloc(dev, grp->npins, sizeof(*pinmux), GFP_KERNEL); if (!pinmux) { of_node_put(np); return -ENOMEM; } - for (j = 0; j < group.num_pins; j++) { + for (j = 0; j < grp->npins; j++) { if (of_property_read_u32_index(np, "pins", j, &pin_id)) { dev_err(dev, "Group %s: Read intel pins id failed\n", - group.name); + grp->name); of_node_put(np); return -EINVAL; } if (pin_id >= drvdata->pctl_desc.npins) { dev_err(dev, "Group %s: Invalid pin ID, idx: %d, pin %u\n", - group.name, j, pin_id); + grp->name, j, pin_id); of_node_put(np); return -EINVAL; } pins[j] = pin_id; if (of_property_read_u32_index(np, "pinmux", j, &pinmux_id)) { dev_err(dev, "Group %s: Read intel pinmux id failed\n", - group.name); + grp->name); of_node_put(np); return -EINVAL; } pinmux[j] = pinmux_id; } - err = pinctrl_generic_add_group(drvdata->pctl_dev, group.name, - group.pins, group.num_pins, + err = pinctrl_generic_add_group(drvdata->pctl_dev, + grp->name, grp->pins, grp->npins, pinmux); if (err < 0) { - dev_err(dev, "Failed to register group %s\n", group.name); + dev_err(dev, "Failed to register group %s\n", grp->name); of_node_put(np); return err; }