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Wysocki" , Huang Rui CC: , , , , Shuah Khan , , "Nathan Fontenot" , Deepak Sharma , Alex Deucher , Mario Limonciello , Shimmer Huang , "Perry Yuan" , Xiaojian Du , Viresh Kumar , Borislav Petkov , "Oleksandr Natalenko" , Meng Li , Wyes Karny Subject: [PATCH V11 6/7] Documentation: amd-pstate: introduce amd-pstate preferred core Date: Wed, 29 Nov 2023 14:54:36 +0800 Message-ID: <20231129065437.290183-7-li.meng@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231129065437.290183-1-li.meng@amd.com> References: <20231129065437.290183-1-li.meng@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002BA52:EE_|MW3PR12MB4459:EE_ X-MS-Office365-Filtering-Correlation-Id: d0ab6f56-5cce-4a4a-740e-08dbf0a83048 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 7tnB0OY9rNwM0Q+mBvebVVe8vxOAmCoUEdGvMUKlWEdUETBO386/4nz/wgpbjfohSIvHi/Z+NrohCOWP5QR7daS6NoFdRaAWlvgGRnqaznEMOZHhKRAhJeg6OFDEPyAmli6bCIT50t5GbEkgXulRg8aD6hL/EtpZeobl6uFIJH1QbFtIEGanMggBDIsszO6b2QMEuDKfCtJNgx4zKeIvC21M0nhcfZYTkhFmtHkoiXsmaw+sM3sYy0pD9N6vIHHy5byUcUvlCtvI9vRPQEyG2+2aWK5mOR0DuCGplvGG8cl2CIbkoJWUQTXAHe4XAWjpDOv75uPUwtt4rvLhaTIEsmLtefUsYke97HSdSYZ5toV22QGSH7PSqNm9QRsloxUy8j/eG4RX74WfD2IqTi79/LB7e3n8l/af3ZbC7YFaLuBbggSbVP1GutduXWPax8mHV/bf/ErnzT/1VaYPi2lK/r0fiSHXJJsCTsWVgoi2qk6s7I79dG2K4UNseA7/bgi9lDZLDSc9hnQfCiXdreiU/Uz494HHG+ov+epWYBG9+w5968i9Wc0/2YMjs/CgSMr4oteaxZulezavITm2tcNjjNw72OTWhXz1PYnAQ0Hi9kP0ziCp2H5r+SwboaJUKfw7cw5IECRbE8w+j8yTNcTF/+IX5kiliyKMzf8gdR5h9kwhnfB3l5X7r1VFdKJEl/4Yb3TO2seiK123rEolXmQTjmMjK8xCks2Dh7mmYPTVu9aiYYJzLK1Us5hErB+8H8tD8gj5rmahS5LDDfjLOkauxQ== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(346002)(376002)(136003)(396003)(39860400002)(230922051799003)(451199024)(64100799003)(186009)(82310400011)(1800799012)(36840700001)(40470700004)(46966006)(40460700003)(316002)(6636002)(70206006)(110136005)(70586007)(54906003)(336012)(36756003)(16526019)(6666004)(426003)(26005)(1076003)(2616005)(478600001)(82740400003)(83380400001)(356005)(81166007)(86362001)(36860700001)(7696005)(47076005)(40480700001)(5660300002)(7416002)(2906002)(8936002)(41300700001)(4326008)(8676002)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Nov 2023 06:55:35.7658 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d0ab6f56-5cce-4a4a-740e-08dbf0a83048 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002BA52.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW3PR12MB4459 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Tue, 28 Nov 2023 22:56:07 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1783880453181027673 X-GMAIL-MSGID: 1783880453181027673 Introduce amd-pstate preferred core. check preferred core state set by the kernel parameter: $ cat /sys/devices/system/cpu/amd-pstate/prefcore Tested-by: Oleksandr Natalenko Reviewed-by: Wyes Karny Reviewed-by: Mario Limonciello Reviewed-by: Huang Rui Signed-off-by: Meng Li Reviewed-by: Perry Yuan < perry.yuan@amd.com> --- Documentation/admin-guide/pm/amd-pstate.rst | 59 ++++++++++++++++++++- 1 file changed, 57 insertions(+), 2 deletions(-) diff --git a/Documentation/admin-guide/pm/amd-pstate.rst b/Documentation/admin-guide/pm/amd-pstate.rst index 1cf40f69278c..0b832ff529db 100644 --- a/Documentation/admin-guide/pm/amd-pstate.rst +++ b/Documentation/admin-guide/pm/amd-pstate.rst @@ -300,8 +300,8 @@ platforms. The AMD P-States mechanism is the more performance and energy efficiency frequency management method on AMD processors. -AMD Pstate Driver Operation Modes -================================= +``amd-pstate`` Driver Operation Modes +====================================== ``amd_pstate`` CPPC has 3 operation modes: autonomous (active) mode, non-autonomous (passive) mode and guided autonomous (guided) mode. @@ -353,6 +353,48 @@ is activated. In this mode, driver requests minimum and maximum performance level and the platform autonomously selects a performance level in this range and appropriate to the current workload. +``amd-pstate`` Preferred Core +================================= + +The core frequency is subjected to the process variation in semiconductors. +Not all cores are able to reach the maximum frequency respecting the +infrastructure limits. Consequently, AMD has redefined the concept of +maximum frequency of a part. This means that a fraction of cores can reach +maximum frequency. To find the best process scheduling policy for a given +scenario, OS needs to know the core ordering informed by the platform through +highest performance capability register of the CPPC interface. + +``amd-pstate`` preferred core enables the scheduler to prefer scheduling on +cores that can achieve a higher frequency with lower voltage. The preferred +core rankings can dynamically change based on the workload, platform conditions, +thermals and ageing. + +The priority metric will be initialized by the ``amd-pstate`` driver. The ``amd-pstate`` +driver will also determine whether or not ``amd-pstate`` preferred core is +supported by the platform. + +``amd-pstate`` driver will provide an initial core ordering when the system boots. +The platform uses the CPPC interfaces to communicate the core ranking to the +operating system and scheduler to make sure that OS is choosing the cores +with highest performance firstly for scheduling the process. When ``amd-pstate`` +driver receives a message with the highest performance change, it will +update the core ranking and set the cpu's priority. + +``amd-pstate`` Preferred Core Switch +================================= +Kernel Parameters +----------------- + +``amd-pstate`` peferred core`` has two states: enable and disable. +Enable/disable states can be chosen by different kernel parameters. +Default enable ``amd-pstate`` preferred core. + +``amd_prefcore=disable`` + +For systems that support ``amd-pstate`` preferred core, the core rankings will +always be advertised by the platform. But OS can choose to ignore that via the +kernel parameter ``amd_prefcore=disable``. + User Space Interface in ``sysfs`` - General =========================================== @@ -385,6 +427,19 @@ control its functionality at the system level. They are located in the to the operation mode represented by that string - or to be unregistered in the "disable" case. +``prefcore`` + Preferred core state of the driver: "enabled" or "disabled". + + "enabled" + Enable the ``amd-pstate`` preferred core. + + "disabled" + Disable the ``amd-pstate`` preferred core + + + This attribute is read-only to check the state of preferred core set + by the kernel parameter. + ``cpupower`` tool support for ``amd-pstate`` ===============================================