diff mbox series

[1/2] dt-bindings: serial: qcom,msm-uartdm: Vote for shared resources

Message ID 20231128-serial-msm-dvfs-v1-1-4f290d20a4be@kernkonzept.com
State New
Headers
Series serial: msm: Allow scaling power domains and interconnect |

Commit Message

Stephan Gerhold Nov. 28, 2023, 9:43 a.m. UTC 
  Document power-domains, operating-points-v2 and interconnects to allow
making performance state votes for certain clock frequencies of the UART
DM controller. The interconnect path to DRAM is needed when UART DM is
used together with a DMA engine.

Voting for these shared resources is necessary to guarantee performance
with power management enabled. Otherwise these resources might run at
minimal performance state which is not sufficient for certain UART
baud rates.

Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com>
---
 .../devicetree/bindings/serial/qcom,msm-uartdm.yaml         | 13 +++++++++++++
 1 file changed, 13 insertions(+)

Comments

Rob Herring Nov. 29, 2023, 2:58 p.m. UTC | #1 
On Tue, Nov 28, 2023 at 10:43:32AM +0100, Stephan Gerhold wrote:
> Document power-domains, operating-points-v2 and interconnects to allow
> making performance state votes for certain clock frequencies of the UART
> DM controller. The interconnect path to DRAM is needed when UART DM is
> used together with a DMA engine.
> 
> Voting for these shared resources is necessary to guarantee performance
> with power management enabled. Otherwise these resources might run at
> minimal performance state which is not sufficient for certain UART
> baud rates.

I find the subject a bit strange because voting is a QCom term/concept 
and somewhat outside the scope of the binding. The justification is 
really just that the h/w has these resources. In any case,

Reviewed-by: Rob Herring <robh@kernel.org>

> Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com>
> ---
>  .../devicetree/bindings/serial/qcom,msm-uartdm.yaml         | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.yaml b/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.yaml
index ee52bf8e8917..e0fa363ad7e2 100644
--- a/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.yaml
+++ b/Documentation/devicetree/bindings/serial/qcom,msm-uartdm.yaml
@@ -48,9 +48,17 @@  properties:
       - const: tx
       - const: rx
 
+  interconnects:
+    maxItems: 1
+
   interrupts:
     maxItems: 1
 
+  operating-points-v2: true
+
+  power-domains:
+    maxItems: 1
+
   qcom,rx-crci:
     $ref: /schemas/types.yaml#/definitions/uint32
     description:
@@ -99,7 +107,9 @@  unevaluatedProperties: false
 
 examples:
   - |
+    #include <dt-bindings/interconnect/qcom,msm8996.h>
     #include <dt-bindings/interrupt-controller/arm-gic.h>
+    #include <dt-bindings/power/qcom-rpmpd.h>
 
     serial@f991e000 {
         compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
@@ -109,4 +119,7 @@  examples:
         clock-names = "core", "iface";
         dmas = <&dma0 0>, <&dma0 1>;
         dma-names = "tx", "rx";
+        power-domains = <&rpmpd MSM8996_VDDCX>;
+        operating-points-v2 = <&uart_opp_table>;
+        interconnects = <&pnoc MASTER_BLSP_1 &bimc SLAVE_EBI_CH0>;
     };