diff mbox series

arm64: dts: qcom: ipq8074: Add QUP4 SPI node

Message ID 20231123121324.1046164-1-robimarko@gmail.com
State New
Headers
Series arm64: dts: qcom: ipq8074: Add QUP4 SPI node |

Commit Message

Robert Marko Nov. 23, 2023, 12:12 p.m. UTC 
  Add node to support the QUP4 SPI controller inside of IPQ8074.
Some devices use this bus to communicate to a Bluetooth controller.

Signed-off-by: Robert Marko <robimarko@gmail.com>
---
 arch/arm64/boot/dts/qcom/ipq8074.dtsi | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

Comments

Bjorn Andersson Dec. 8, 2023, 2:57 a.m. UTC | #1 
On Thu, 23 Nov 2023 13:12:54 +0100, Robert Marko wrote:
> Add node to support the QUP4 SPI controller inside of IPQ8074.
> Some devices use this bus to communicate to a Bluetooth controller.
> 
> 

Applied, thanks!

[1/1] arm64: dts: qcom: ipq8074: Add QUP4 SPI node
      commit: 6a25e70214fde6dcf900271c819c8d7fe7b9a4b0

Best regards,
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
index d8e8a5cded64..1b9e50edc892 100644
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -744,6 +744,20 @@  blsp1_i2c3: i2c@78b7000 {
 			status = "disabled";
 		};
 
+		blsp1_spi4: spi@78b8000 {
+			compatible = "qcom,spi-qup-v2.2.1";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x78b8000 0x600>;
+			interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&gcc GCC_BLSP1_QUP4_SPI_APPS_CLK>,
+				 <&gcc GCC_BLSP1_AHB_CLK>;
+			clock-names = "core", "iface";
+			dmas = <&blsp_dma 18>, <&blsp_dma 19>;
+			dma-names = "tx", "rx";
+			status = "disabled";
+		};
+
 		blsp1_i2c5: i2c@78b9000 {
 			compatible = "qcom,i2c-qup-v2.2.1";
 			#address-cells = <1>;