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[2620:137:e000::3:2]) by mx.google.com with ESMTPS id y187-20020a6364c4000000b005b9b68add85si12733714pgb.254.2023.11.22.05.23.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Nov 2023 05:23:40 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) client-ip=2620:137:e000::3:2; Authentication-Results: mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b=wVhEuLx9; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:2 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by agentk.vger.email (Postfix) with ESMTP id 6931A81BDA59; Wed, 22 Nov 2023 05:23:29 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at agentk.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344118AbjKVNX0 (ORCPT + 99 others); Wed, 22 Nov 2023 08:23:26 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51580 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344053AbjKVNXZ (ORCPT ); Wed, 22 Nov 2023 08:23:25 -0500 Received: from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com [185.132.182.106]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 421B3193; Wed, 22 Nov 2023 05:23:21 -0800 (PST) Received: from pps.filterd (m0241204.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.22/8.17.1.22) with ESMTP id 3AMD7TjJ013930; Wed, 22 Nov 2023 14:22:27 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= selector1; bh=1qGFaBcs+OGg0vqscD04cfo2vPPfTvTMkHJAI0v67YY=; b=wV hEuLx9Xs6w6mqPDY3CLBI0sQsjOLBPr2sqYlYAieeljcGWfak9zoagiDxqMOVxqN RzWfR3eg10SFu72uJJrhdFjFzniFXQ1zHA3/WLNIFN0iudf3RsuNnC609hBAeEVL 6Oi06LJEt8+bOnurCoNowMPENbHS5yiAcHSNdojLz5yRNziLH5HJ/YyziKXb9LPY V8/U6XnJm5VghVCcswyVKls55jYHG2uprsg4Lp4U2ijc1TUsucbYXdUFoVuQeFXd SJlctl+Gy64hKx8z5d6PolYP7clwM85dEvW5uItxxWUXf5UDnvBYoe7tlLR68/47 03qauN6RSM/J9FmazPhg== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3ugwu3xn4e-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 22 Nov 2023 14:22:27 +0100 (CET) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 1387010003E; Wed, 22 Nov 2023 14:22:27 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 09FA722A6C2; Wed, 22 Nov 2023 14:22:27 +0100 (CET) Received: from localhost (10.201.21.240) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Wed, 22 Nov 2023 14:22:26 +0100 From: To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Coquelin , Alexandre Torgue , Philipp Zabel , Gabriel Fernandez CC: , , , , Subject: [PATCH v3 1/5] clk: stm32mp1: move stm32mp1 clock driver into stm32 directory Date: Wed, 22 Nov 2023 14:21:52 +0100 Message-ID: <20231122132156.158103-2-gabriel.fernandez@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231122132156.158103-1-gabriel.fernandez@foss.st.com> References: <20231122132156.158103-1-gabriel.fernandez@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.21.240] X-ClientProxiedBy: SHFCAS1NODE1.st.com (10.75.129.72) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-22_09,2023-11-22_01,2023-05-22_02 X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Wed, 22 Nov 2023 05:23:29 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1783270652603734937 X-GMAIL-MSGID: 1783270652603734937 From: Gabriel Fernandez Move all STM32MP clock drivers into same directory (stm32). Signed-off-by: Gabriel Fernandez --- drivers/clk/Kconfig | 11 +--------- drivers/clk/Makefile | 1 - drivers/clk/stm32/Kconfig | 29 ++++++++++++++++++++++++++ drivers/clk/stm32/Makefile | 1 + drivers/clk/{ => stm32}/clk-stm32mp1.c | 0 5 files changed, 31 insertions(+), 11 deletions(-) create mode 100644 drivers/clk/stm32/Kconfig rename drivers/clk/{ => stm32}/clk-stm32mp1.c (100%) diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index c30d0d396f7a..50af5fc7f570 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -414,16 +414,6 @@ config COMMON_CLK_VC7 Renesas Versaclock7 is a family of configurable clock generator and jitter attenuator ICs with fractional and integer dividers. -config COMMON_CLK_STM32MP135 - def_bool COMMON_CLK && MACH_STM32MP13 - help - Support for stm32mp135 SoC family clocks - -config COMMON_CLK_STM32MP157 - def_bool COMMON_CLK && MACH_STM32MP157 - help - Support for stm32mp157 SoC family clocks - config COMMON_CLK_STM32F def_bool COMMON_CLK && (MACH_STM32F429 || MACH_STM32F469 || MACH_STM32F746) help @@ -504,6 +494,7 @@ source "drivers/clk/starfive/Kconfig" source "drivers/clk/sunxi/Kconfig" source "drivers/clk/sunxi-ng/Kconfig" source "drivers/clk/tegra/Kconfig" +source "drivers/clk/stm32/Kconfig" source "drivers/clk/ti/Kconfig" source "drivers/clk/uniphier/Kconfig" source "drivers/clk/visconti/Kconfig" diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index ed71f2e0ee36..14fa8d4ecc1f 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -70,7 +70,6 @@ obj-$(CONFIG_COMMON_CLK_SI570) += clk-si570.o obj-$(CONFIG_COMMON_CLK_SP7021) += clk-sp7021.o obj-$(CONFIG_COMMON_CLK_STM32F) += clk-stm32f4.o obj-$(CONFIG_COMMON_CLK_STM32H7) += clk-stm32h7.o -obj-$(CONFIG_COMMON_CLK_STM32MP157) += clk-stm32mp1.o obj-$(CONFIG_COMMON_CLK_TPS68470) += clk-tps68470.o obj-$(CONFIG_CLK_TWL6040) += clk-twl6040.o obj-$(CONFIG_CLK_TWL) += clk-twl.o diff --git a/drivers/clk/stm32/Kconfig b/drivers/clk/stm32/Kconfig new file mode 100644 index 000000000000..3c8493a94a11 --- /dev/null +++ b/drivers/clk/stm32/Kconfig @@ -0,0 +1,29 @@ +# SPDX-License-Identifier: GPL-2.0-only +# common clock support for STMicroelectronics SoC family. + +menuconfig COMMON_CLK_STM32MP + bool "Clock support for common STM32MP clocks" + depends on ARCH_STM32 || COMPILE_TEST + default y + select RESET_CONTROLLER + help + Support for STM32MP SoC family clocks. + +if COMMON_CLK_STM32MP + +config COMMON_CLK_STM32MP135 + bool "Clock driver for stm32mp13x clocks" + depends on ARM || COMPILE_TEST + default y + help + Support for stm32mp13x SoC family clocks. + +config COMMON_CLK_STM32MP157 + bool "Clock driver for stm32mp15x clocks" + depends on ARM || COMPILE_TEST + default y + help + Support for stm32mp15x SoC family clocks. + +endif + diff --git a/drivers/clk/stm32/Makefile b/drivers/clk/stm32/Makefile index 95bd2230bba0..c154ef3e88f9 100644 --- a/drivers/clk/stm32/Makefile +++ b/drivers/clk/stm32/Makefile @@ -1 +1,2 @@ obj-$(CONFIG_COMMON_CLK_STM32MP135) += clk-stm32mp13.o clk-stm32-core.o reset-stm32.o +obj-$(CONFIG_COMMON_CLK_STM32MP157) += clk-stm32mp1.o diff --git a/drivers/clk/clk-stm32mp1.c b/drivers/clk/stm32/clk-stm32mp1.c similarity index 100% rename from drivers/clk/clk-stm32mp1.c rename to drivers/clk/stm32/clk-stm32mp1.c