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Wed, 22 Nov 2023 15:35:56 -0800 (PST) From: Charlie Jenkins Date: Wed, 22 Nov 2023 15:35:54 -0800 Subject: [PATCH v2] Support rv32 ULEB128 test MIME-Version: 1.0 Message-Id: <20231122-module_fixup-v2-1-dfb9565e9ea5@rivosinc.com> X-B4-Tracking: v=1; b=H4sIAFmQXmUC/3WMQQ6CMBBFr0JmbQ2toUNdeQ9DjJRBJpGWtNJoS O9uZe/y/Z/3NogUmCKcqw0CJY7sXQF1qMBOd/cgwUNhULU6SSlRzH5Yn3Qb+b0uQhuDLQ7GNhq hKEugcuy5a1d44vjy4bPXk/ytf0JJilpo1feIOOpWNZfAyUd29mj9DF3O+Qu7atE6qwAAAA== To: Paul Walmsley , Palmer Dabbelt , Albert Ou , Randy Dunlap , Ron Economos Cc: Palmer Dabbelt , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Charlie Jenkins X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1700696155; l=1713; i=charlie@rivosinc.com; s=20231120; h=from:subject:message-id; bh=WzToCDP5Qw2xTrkNy2aM0wX/cM3k+sRc5gs0EqwGACQ=; b=/QBxu58uLtm84zLX3i6W3znwC4jhHOymQSKuIMPwMBboSBZZwItrbTXHjhD9bSPu6MnY6a9DR BCKUS7SU7tSBFWE3YZPTqox+oc8IG1crFtsLJgwyocTeOUApIvURJaT X-Developer-Key: i=charlie@rivosinc.com; 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Fixes: af71bc194916 ("riscv: Add tests for riscv module loading") Signed-off-by: Charlie Jenkins Reported-by: Randy Dunlap Closes: https://lore.kernel.org/lkml/1d7c71ee-5742-4df4-b8ef-a2aea0a624eb@infradead.org/ Tested-by: Randy Dunlap # build-tested --- Support module linking tests on rv32 toolchains with uleb128 support. --- Changes in v2: - Drop patch covered in different series - Link to v1: https://lore.kernel.org/r/20231117-module_fixup-v1-0-62bb777f6825@rivosinc.com --- arch/riscv/kernel/tests/module_test/test_uleb128.S | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) --- base-commit: 9bacdd8996c77c42ca004440be610692275ff9d0 change-id: 20231117-module_fixup-699787d9c567 diff --git a/arch/riscv/kernel/tests/module_test/test_uleb128.S b/arch/riscv/kernel/tests/module_test/test_uleb128.S index 90f22049d553..8515ed7cd8c1 100644 --- a/arch/riscv/kernel/tests/module_test/test_uleb128.S +++ b/arch/riscv/kernel/tests/module_test/test_uleb128.S @@ -6,13 +6,13 @@ .text .global test_uleb_basic test_uleb_basic: - ld a0, second + lw a0, second addi a0, a0, -127 ret .global test_uleb_large test_uleb_large: - ld a0, fourth + lw a0, fourth addi a0, a0, -0x07e8 ret @@ -22,10 +22,10 @@ first: second: .reloc second, R_RISCV_SET_ULEB128, second .reloc second, R_RISCV_SUB_ULEB128, first - .dword 0 + .word 0 third: .space 1000 fourth: .reloc fourth, R_RISCV_SET_ULEB128, fourth .reloc fourth, R_RISCV_SUB_ULEB128, third - .dword 0 + .word 0