From patchwork Tue Nov 21 11:56:09 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 167687 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2b07:b0:403:3b70:6f57 with SMTP id io7csp565264vqb; Tue, 21 Nov 2023 03:59:43 -0800 (PST) X-Google-Smtp-Source: AGHT+IGIs0d9E8nSk2q0Ghym17oor2zBx0A9+GKrU93Pqx0p98bbIAykXxyylteJ7IaZUgl4Ekj1 X-Received: by 2002:a17:90a:1188:b0:27f:df1a:caab with SMTP id e8-20020a17090a118800b0027fdf1acaabmr11801011pja.21.1700567982853; Tue, 21 Nov 2023 03:59:42 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1700567982; cv=none; d=google.com; s=arc-20160816; b=sduktL9wtXTtdpUgmJkiylGvJZOFsNkz84J58NBc59/lhS3OuGipBlS7UHqBh1pj3P 0dc0bCtrzbBoX1aAC8upFBev8+AdVdJ35TCugs/269xHmuZ2dRKJ1Nsiz1HRZzxluDpl ajl9NfmmeI5CwdoSaK8fQAWBgPeTfgSQ01tpuY8PQ6KHkADMerHL5kTbg7Js/NXw9jMI eVY4oyLsA1ZoExwENW/tCjL3GKgDAB7X2bZx3lgZ7rSeyfp8WRt1kc7TpSowvxSJLPOB p13oR6v2pdAzf3xocuDLyegpPd03+WeHAN26C+2P8jShX3P44O7Iab7o9IMSrBxVjcm8 lqhQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=sq9G32K6TtoLD+AvzTy4qXTHDqDo8A0lDQFf/DMBYSM=; fh=m5p6pcg3y47Sg5VKYWXj0f0nOzgFq4l5+GGYwGce+t4=; b=TlXTuf1vAf/n0IXKExIfnv5WgpwGMJcTY9pndXKVALSeF2QPSaoxWTG4nrcQld4Qvo eMEEYg0Wb6ve1x5TyNHgRITUqZKJuNKvo35tSPwAleh6pliAcl8jinvCilCkj6nRRC0L 3ooiuMT4VMC4Lud/n3/38C/eZzfA1dckLFTaz4MjOEFfohDGlTmBzUvSelaKV31ZCxua OrIRsbVranzsNrOnecklYfdxW+B4z/6S4Yy+Q1VlpvButXl6cWXvL7jlmSsuGtdE917b yC8HWLqFq+KBUcwQJtxmK26mXnkCb/qxX0JfFX/akge0aGzz9AaIWI6hUHzqyXAgJtrB EobA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=EXLibqZS; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from snail.vger.email (snail.vger.email. [2620:137:e000::3:7]) by mx.google.com with ESMTPS id z15-20020a17090a1fcf00b0026b31ed4895si11919873pjz.29.2023.11.21.03.59.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Nov 2023 03:59:42 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) client-ip=2620:137:e000::3:7; Authentication-Results: mx.google.com; dkim=pass header.i=@collabora.com header.s=mail header.b=EXLibqZS; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=collabora.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id 09D0580DEA7C; Tue, 21 Nov 2023 03:57:20 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234731AbjKUL5J (ORCPT + 99 others); Tue, 21 Nov 2023 06:57:09 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35206 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234196AbjKUL4m (ORCPT ); Tue, 21 Nov 2023 06:56:42 -0500 Received: from madras.collabora.co.uk (madras.collabora.co.uk [46.235.227.172]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3AA8ED61; Tue, 21 Nov 2023 03:56:39 -0800 (PST) Received: from IcarusMOD.eternityproject.eu (cola.collaboradmins.com [195.201.22.229]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id 2D3786607326; Tue, 21 Nov 2023 11:56:36 +0000 (GMT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1700567797; bh=HjqA+sAHeyELuvvhdsMlpINGaociXjYFjdm6q68a7V8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=EXLibqZSgqMFvSVmoKDxfiKEQt35SplGXYfEg0Lcj17c8DSbVnMxGi6iEm0voHTvZ imrVUalRfN3zbP8nWm7kIs3ThcWyUfo3BfPOxmJXPfHlbycx83nbyqSQjLe/zleNtF RMylCGCl5GUUqZbV0vHkBUjZml8Ju6LjfT9WKBJML4qcW+Ri42HmoowQabxNEE+cpw rOn2wHx21vMBYPSCq7p1JBEHF5wl24uxPgKofemsTZ/RMuaml4SgMi8L8wHuwdmnSi zW4mdpWRfTJ+a8eKU6nyt83qLmTExAbnqrko6tpp6VnrZGyWwBrgkxepK1G3PwtS8Q E/N/3R5fqCZRg== From: AngeloGioacchino Del Regno To: matthias.bgg@gmail.com Cc: krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, robh+dt@kernel.org, angelogioacchino.delregno@collabora.com, p.zabel@pengutronix.de, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, kernel@collabora.com, wenst@chromium.org Subject: [PATCH v2 05/20] soc: mediatek: mtk-svs: Reduce memory footprint of struct svs_bank Date: Tue, 21 Nov 2023 12:56:09 +0100 Message-ID: <20231121115624.56855-6-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231121115624.56855-1-angelogioacchino.delregno@collabora.com> References: <20231121115624.56855-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Tue, 21 Nov 2023 03:57:21 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1783174773413008709 X-GMAIL-MSGID: 1783174773413008709 Many 32-bit members of this struct can be size reduced to either 16-bit or even 8-bit, for a total saving of ~61 bytes per bank. Keeping in mind that one SoC declares at least two banks, this brings a minimum of ~122 bytes saving (depending on compiler optimization). Signed-off-by: AngeloGioacchino Del Regno --- drivers/soc/mediatek/mtk-svs.c | 51 +++++++++++++++++----------------- 1 file changed, 26 insertions(+), 25 deletions(-) diff --git a/drivers/soc/mediatek/mtk-svs.c b/drivers/soc/mediatek/mtk-svs.c index 1c7592fd6ae7..6c27fb523bfa 100644 --- a/drivers/soc/mediatek/mtk-svs.c +++ b/drivers/soc/mediatek/mtk-svs.c @@ -456,13 +456,13 @@ struct svs_bank { char *buck_name; char *tzone_name; enum svsb_phase phase; - s32 volt_od; + short int volt_od; u32 reg_data[SVSB_PHASE_MAX][SVS_REG_MAX]; u32 pm_runtime_enabled_count; - u32 mode_support; + u8 mode_support; u32 freq_base; u32 turn_freq_base; - u32 vboot; + u8 vboot; u32 opp_dfreq[MAX_OPP_ENTRIES]; u32 opp_dvolt[MAX_OPP_ENTRIES]; u32 freq_pct[MAX_OPP_ENTRIES]; @@ -470,36 +470,36 @@ struct svs_bank { u32 volt_step; u32 volt_base; u32 volt_flags; - u32 vmax; - u32 vmin; + u8 vmax; + u8 vmin; u32 age_config; - u32 age_voffset_in; + u16 age_voffset_in; u32 dc_config; - u32 dc_voffset_in; - u32 dvt_fixed; - u32 vco; - u32 chk_shift; + u16 dc_voffset_in; + u8 dvt_fixed; + u8 vco; + u8 chk_shift; u32 core_sel; - u32 opp_count; + u8 opp_count; u32 int_st; - u32 sw_id; - u32 cpu_id; + u8 sw_id; + u8 cpu_id; u32 ctl0; u32 temp; u32 tzone_htemp; - u32 tzone_htemp_voffset; + u16 tzone_htemp_voffset; u32 tzone_ltemp; - u32 tzone_ltemp_voffset; - u32 bts; - u32 mts; - u32 bdes; - u32 mdes; - u32 mtdes; - u32 dcbdet; - u32 dcmdet; + u16 tzone_ltemp_voffset; + u16 bts; + u16 mts; + u16 bdes; + u16 mdes; + u8 mtdes; + u8 dcbdet; + u8 dcmdet; u32 turn_pt; u32 vbin_turn_pt; - u32 type; + u8 type; }; static u32 percent(u32 numerator, u32 denominator) @@ -1267,6 +1267,7 @@ static inline void svs_error_isr_handler(struct svs_platform *svsp) static inline void svs_init01_isr_handler(struct svs_platform *svsp) { struct svs_bank *svsb = svsp->pbank; + u32 val; dev_info(svsb->dev, "%s: VDN74~30:0x%08x~0x%08x, DC:0x%08x\n", __func__, svs_readl_relaxed(svsp, VDESIGN74), @@ -1276,8 +1277,8 @@ static inline void svs_init01_isr_handler(struct svs_platform *svsp) svs_save_bank_register_data(svsp, SVSB_PHASE_INIT01); svsb->phase = SVSB_PHASE_INIT01; - svsb->dc_voffset_in = ~(svs_readl_relaxed(svsp, DCVALUES) & - GENMASK(15, 0)) + 1; + val = ~(svs_readl_relaxed(svsp, DCVALUES) & GENMASK(15, 0)) + 1; + svsb->dc_voffset_in = val & GENMASK(15, 0); if (svsb->volt_flags & SVSB_INIT01_VOLT_IGNORE || (svsb->dc_voffset_in & SVSB_DC_SIGNED_BIT && svsb->volt_flags & SVSB_INIT01_VOLT_INC_ONLY))