| Message ID | 20231117105635.343-5-quic_sibis@quicinc.com |
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From: Sibi Sankar <quic_sibis@quicinc.com>
To: <andersson@kernel.org>, <konrad.dybcio@linaro.org>,
<will@kernel.org>, <robin.murphy@arm.com>, <joro@8bytes.org>,
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Sibi Sankar <quic_sibis@quicinc.com>
Subject: [PATCH V2 4/4] dt-bindings: interrupt-controller: qcom,pdc: document
pdc on X1E80100
Date: Fri, 17 Nov 2023 16:26:35 +0530
Message-ID: <20231117105635.343-5-quic_sibis@quicinc.com>
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| Series |
dt-bindings: Document gpi/pdc/scm/smmu for X1E80100
|
|
Commit Message
Sibi Sankar
Nov. 17, 2023, 10:56 a.m. UTC
The X1E80100 SoC includes a PDC, document it.
Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
---
.../devicetree/bindings/interrupt-controller/qcom,pdc.yaml | 1 +
1 file changed, 1 insertion(+)
Comments
On 17/11/2023 11:56, Sibi Sankar wrote: > The X1E80100 SoC includes a PDC, document it. > > Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> > --- Please rebase on next. Best regards, Krzysztof
On 11/17/23 18:37, Krzysztof Kozlowski wrote: > On 17/11/2023 11:56, Sibi Sankar wrote: >> The X1E80100 SoC includes a PDC, document it. >> >> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> >> --- > > Please rebase on next. This series was based on lnext-20231117. -Sibi > > Best regards, > Krzysztof >
diff --git a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml index 86d61896f591..ea10cade3453 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/qcom,pdc.yaml @@ -41,6 +41,7 @@ properties: - qcom,sm8250-pdc - qcom,sm8350-pdc - qcom,sm8450-pdc + - qcom,x1e80100-pdc - const: qcom,pdc reg: