Message ID | 20231117105635.343-2-quic_sibis@quicinc.com |
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State | New |
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dt-bindings: Document gpi/pdc/scm/smmu for X1E80100
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Commit Message
Sibi Sankar
Nov. 17, 2023, 10:56 a.m. UTC
From: Rajendra Nayak <quic_rjendra@quicinc.com> Add the SoC specific compatible for X1E80100 implementing arm,mmu-500. Signed-off-by: Rajendra Nayak <quic_rjendra@quicinc.com> Co-developed-by: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- v2: * Update the part number from sc8380xp to x1e80100. * Pickup Rbs. Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml index aa9e1c0895a5..7ae4f65fe236 100644 --- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml @@ -56,6 +56,7 @@ properties: - qcom,sm8350-smmu-500 - qcom,sm8450-smmu-500 - qcom,sm8550-smmu-500 + - qcom,x1e80100-smmu-500 - const: qcom,smmu-500 - const: arm,mmu-500 @@ -475,6 +476,7 @@ allOf: - qcom,sm8350-smmu-500 - qcom,sm8450-smmu-500 - qcom,sm8550-smmu-500 + - qcom,x1e80100-smmu-500 then: properties: clock-names: false