[v3] arm64: defconfig: Enable GCC, pinctrl and interconnect for SDX75

Message ID 20231117055849.534671-1-quic_rohiagar@quicinc.com
State New
Headers
Series [v3] arm64: defconfig: Enable GCC, pinctrl and interconnect for SDX75 |

Commit Message

Rohit Agarwal Nov. 17, 2023, 5:58 a.m. UTC
  Enable Global Clock controller, pinctrl and interconnect framework
support for Qualcomm's SDX75 SoC which is required to boot to
console on sdx75-idp platform.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
---

Hi,

Changes in v3:
 - Clubbed all the three patches in a single patch.
 - Link to v2: https://lore.kernel.org/all/20231116093513.14259-1-quic_rohiagar@quicinc.com/

Changes in v2:
 - Updated the commit message for the patches.

Thanks,
Rohit.

 arch/arm64/configs/defconfig | 3 +++
 1 file changed, 3 insertions(+)
  

Comments

Manivannan Sadhasivam Nov. 17, 2023, 9:03 a.m. UTC | #1
On Fri, Nov 17, 2023 at 11:28:49AM +0530, Rohit Agarwal wrote:
> Enable Global Clock controller, pinctrl and interconnect framework
> support for Qualcomm's SDX75 SoC which is required to boot to
> console on sdx75-idp platform.
> 
> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
> ---
> 
> Hi,
> 
> Changes in v3:
>  - Clubbed all the three patches in a single patch.
>  - Link to v2: https://lore.kernel.org/all/20231116093513.14259-1-quic_rohiagar@quicinc.com/
> 
> Changes in v2:
>  - Updated the commit message for the patches.
> 
> Thanks,
> Rohit.
> 
>  arch/arm64/configs/defconfig | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
> index b60aa1f89343..4c0cd428d073 100644
> --- a/arch/arm64/configs/defconfig
> +++ b/arch/arm64/configs/defconfig
> @@ -599,6 +599,7 @@ CONFIG_PINCTRL_SC8280XP=y
>  CONFIG_PINCTRL_SDM660=y
>  CONFIG_PINCTRL_SDM670=y
>  CONFIG_PINCTRL_SDM845=y
> +CONFIG_PINCTRL_SDX75=y
>  CONFIG_PINCTRL_SM6115=y
>  CONFIG_PINCTRL_SM6115_LPASS_LPI=m
>  CONFIG_PINCTRL_SM6125=y
> @@ -1252,6 +1253,7 @@ CONFIG_SDM_GPUCC_845=y
>  CONFIG_SDM_VIDEOCC_845=y
>  CONFIG_SDM_DISPCC_845=y
>  CONFIG_SDM_LPASSCC_845=m
> +CONFIG_SDX_GCC_75=y
>  CONFIG_SM_CAMCC_8250=m
>  CONFIG_SM_DISPCC_6115=m
>  CONFIG_SM_DISPCC_8250=y
> @@ -1519,6 +1521,7 @@ CONFIG_INTERCONNECT_QCOM_SC7280=y
>  CONFIG_INTERCONNECT_QCOM_SC8180X=y
>  CONFIG_INTERCONNECT_QCOM_SC8280XP=y
>  CONFIG_INTERCONNECT_QCOM_SDM845=y
> +CONFIG_INTERCONNECT_QCOM_SDX75=y

Is there any criteria to make ICC built-in? I'd vote for built-in on all
platforms to keep it aligned eventhough old platforms do not require it for
booting.

- Mani

>  CONFIG_INTERCONNECT_QCOM_SM8150=m
>  CONFIG_INTERCONNECT_QCOM_SM8250=m
>  CONFIG_INTERCONNECT_QCOM_SM8350=m
> -- 
> 2.25.1
> 
>
  
Dmitry Baryshkov Nov. 17, 2023, 9:05 a.m. UTC | #2
On Fri, 17 Nov 2023 at 11:03, Manivannan Sadhasivam
<manivannan.sadhasivam@linaro.org> wrote:
>
> On Fri, Nov 17, 2023 at 11:28:49AM +0530, Rohit Agarwal wrote:
> > Enable Global Clock controller, pinctrl and interconnect framework
> > support for Qualcomm's SDX75 SoC which is required to boot to
> > console on sdx75-idp platform.
> >
> > Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
> > ---
> >
> > Hi,
> >
> > Changes in v3:
> >  - Clubbed all the three patches in a single patch.
> >  - Link to v2: https://lore.kernel.org/all/20231116093513.14259-1-quic_rohiagar@quicinc.com/
> >
> > Changes in v2:
> >  - Updated the commit message for the patches.
> >
> > Thanks,
> > Rohit.
> >
> >  arch/arm64/configs/defconfig | 3 +++
> >  1 file changed, 3 insertions(+)
> >
> > diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
> > index b60aa1f89343..4c0cd428d073 100644
> > --- a/arch/arm64/configs/defconfig
> > +++ b/arch/arm64/configs/defconfig
> > @@ -599,6 +599,7 @@ CONFIG_PINCTRL_SC8280XP=y
> >  CONFIG_PINCTRL_SDM660=y
> >  CONFIG_PINCTRL_SDM670=y
> >  CONFIG_PINCTRL_SDM845=y
> > +CONFIG_PINCTRL_SDX75=y
> >  CONFIG_PINCTRL_SM6115=y
> >  CONFIG_PINCTRL_SM6115_LPASS_LPI=m
> >  CONFIG_PINCTRL_SM6125=y
> > @@ -1252,6 +1253,7 @@ CONFIG_SDM_GPUCC_845=y
> >  CONFIG_SDM_VIDEOCC_845=y
> >  CONFIG_SDM_DISPCC_845=y
> >  CONFIG_SDM_LPASSCC_845=m
> > +CONFIG_SDX_GCC_75=y
> >  CONFIG_SM_CAMCC_8250=m
> >  CONFIG_SM_DISPCC_6115=m
> >  CONFIG_SM_DISPCC_8250=y
> > @@ -1519,6 +1521,7 @@ CONFIG_INTERCONNECT_QCOM_SC7280=y
> >  CONFIG_INTERCONNECT_QCOM_SC8180X=y
> >  CONFIG_INTERCONNECT_QCOM_SC8280XP=y
> >  CONFIG_INTERCONNECT_QCOM_SDM845=y
> > +CONFIG_INTERCONNECT_QCOM_SDX75=y
>
> Is there any criteria to make ICC built-in? I'd vote for built-in on all
> platforms to keep it aligned eventhough old platforms do not require it for
> booting.

I'd say, we should be able to open the console without any additional
modules. Thus I support your idea.

>
> - Mani
>
> >  CONFIG_INTERCONNECT_QCOM_SM8150=m
> >  CONFIG_INTERCONNECT_QCOM_SM8250=m
> >  CONFIG_INTERCONNECT_QCOM_SM8350=m
> > --
> > 2.25.1
> >
> >
>
> --
> மணிவண்ணன் சதாசிவம்
  
Dmitry Baryshkov Nov. 17, 2023, 9:06 a.m. UTC | #3
On Fri, 17 Nov 2023 at 07:59, Rohit Agarwal <quic_rohiagar@quicinc.com> wrote:
>
> Enable Global Clock controller, pinctrl and interconnect framework
> support for Qualcomm's SDX75 SoC which is required to boot to
> console on sdx75-idp platform.
>
> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
  
Bjorn Andersson Dec. 8, 2023, 2:55 p.m. UTC | #4
On Fri, 17 Nov 2023 11:28:49 +0530, Rohit Agarwal wrote:
> Enable Global Clock controller, pinctrl and interconnect framework
> support for Qualcomm's SDX75 SoC which is required to boot to
> console on sdx75-idp platform.
> 
> 

Applied, thanks!

[1/1] arm64: defconfig: Enable GCC, pinctrl and interconnect for SDX75
      commit: 3515c3172f66ad4b3f485862f858f76a3e49c659

Best regards,
  

Patch

diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index b60aa1f89343..4c0cd428d073 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -599,6 +599,7 @@  CONFIG_PINCTRL_SC8280XP=y
 CONFIG_PINCTRL_SDM660=y
 CONFIG_PINCTRL_SDM670=y
 CONFIG_PINCTRL_SDM845=y
+CONFIG_PINCTRL_SDX75=y
 CONFIG_PINCTRL_SM6115=y
 CONFIG_PINCTRL_SM6115_LPASS_LPI=m
 CONFIG_PINCTRL_SM6125=y
@@ -1252,6 +1253,7 @@  CONFIG_SDM_GPUCC_845=y
 CONFIG_SDM_VIDEOCC_845=y
 CONFIG_SDM_DISPCC_845=y
 CONFIG_SDM_LPASSCC_845=m
+CONFIG_SDX_GCC_75=y
 CONFIG_SM_CAMCC_8250=m
 CONFIG_SM_DISPCC_6115=m
 CONFIG_SM_DISPCC_8250=y
@@ -1519,6 +1521,7 @@  CONFIG_INTERCONNECT_QCOM_SC7280=y
 CONFIG_INTERCONNECT_QCOM_SC8180X=y
 CONFIG_INTERCONNECT_QCOM_SC8280XP=y
 CONFIG_INTERCONNECT_QCOM_SDM845=y
+CONFIG_INTERCONNECT_QCOM_SDX75=y
 CONFIG_INTERCONNECT_QCOM_SM8150=m
 CONFIG_INTERCONNECT_QCOM_SM8250=m
 CONFIG_INTERCONNECT_QCOM_SM8350=m