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From: Andrzej Pietrasiewicz <andrzej.p@collabora.com>
To: linux-media@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org,
linux-stm32@st-md-mailman.stormreply.com
Cc: Hugues Fruchet <hugues.fruchet@foss.st.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Andrzej Pietrasiewicz <andrzej.p@collabora.com>,
Benjamin Gaignard <benjamin.gaignard@collabora.com>,
Daniel Almeida <daniel.almeida@collabora.com>,
Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>,
Hans Verkuil <hverkuil-cisco@xs4all.nl>,
Mauro Carvalho Chehab <mchehab@kernel.org>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Nicolas Dufresne <nicolas.dufresne@collabora.com>,
Philipp Zabel <p.zabel@pengutronix.de>, kernel@collabora.com
Subject: [RFC 2/6] media: verisilicon: Correct a typo in
H1_REG_MAD_CTRL_MAD_THRESHOLD
Date: Thu, 16 Nov 2023 16:48:12 +0100
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| Series |
H.264 stateless encoder RFC 0/6
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Commit Message
Andrzej Pietrasiewicz
Nov. 16, 2023, 3:48 p.m. UTC
It's a THRESHOLD and not a THREDHOLD.
Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@collabora.com>
---
drivers/media/platform/verisilicon/hantro_h1_regs.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Comments
On Thu, Nov 16, 2023 at 11:48 PM Andrzej Pietrasiewicz <andrzej.p@collabora.com> wrote: > > It's a THRESHOLD and not a THREDHOLD. > > Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@collabora.com> Reviewed-by: Chen-Yu Tsai <wens@csie.org>
diff --git a/drivers/media/platform/verisilicon/hantro_h1_regs.h b/drivers/media/platform/verisilicon/hantro_h1_regs.h index 57e89bb975ae..7752d1291c0e 100644 --- a/drivers/media/platform/verisilicon/hantro_h1_regs.h +++ b/drivers/media/platform/verisilicon/hantro_h1_regs.h @@ -92,7 +92,7 @@ #define H1_REG_STR_BUF_LIMIT 0x060 #define H1_REG_MAD_CTRL 0x064 #define H1_REG_MAD_CTRL_QP_ADJUST(x) ((x) << 28) -#define H1_REG_MAD_CTRL_MAD_THREDHOLD(x) ((x) << 22) +#define H1_REG_MAD_CTRL_MAD_THRESHOLD(x) ((x) << 22) #define H1_REG_MAD_CTRL_QP_SUM_DIV2(x) ((x)) #define H1_REG_ADDR_VP8_PROB_CNT 0x068 #define H1_REG_QP_VAL 0x06c