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[23.128.96.37]) by mx.google.com with ESMTPS id o18-20020a63fb12000000b005b8f38f9975si6702366pgh.751.2023.11.13.18.16.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 13 Nov 2023 18:16:46 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) client-ip=23.128.96.37; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id 6FA58806A401; Mon, 13 Nov 2023 18:15:49 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231765AbjKNCPg convert rfc822-to-8bit (ORCPT + 30 others); Mon, 13 Nov 2023 21:15:36 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55984 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231661AbjKNCPb (ORCPT ); Mon, 13 Nov 2023 21:15:31 -0500 Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9DF73D56; Mon, 13 Nov 2023 18:15:26 -0800 (PST) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id 6446F24E15D; Tue, 14 Nov 2023 10:15:25 +0800 (CST) Received: from EXMBX172.cuchost.com (172.16.6.92) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Tue, 14 Nov 2023 10:15:24 +0800 Received: from localhost.localdomain (202.188.176.82) by EXMBX172.cuchost.com (172.16.6.92) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Tue, 14 Nov 2023 10:15:18 +0800 From: Ji Sheng Teoh To: Will Deacon , Mark Rutland , "Rob Herring" , Krzysztof Kozlowski , Conor Dooley , Thomas Gleixner , Peter Zijlstra CC: Ji Sheng Teoh , Ley Foon Tan , , , Subject: [PATCH v2 2/2] dt-bindings: perf: starfive: Add StarLink PMU Date: Tue, 14 Nov 2023 10:12:54 +0800 Message-ID: <20231114021254.3009799-3-jisheng.teoh@starfivetech.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231114021254.3009799-1-jisheng.teoh@starfivetech.com> References: <20231114021254.3009799-1-jisheng.teoh@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [202.188.176.82] X-ClientProxiedBy: EXCAS062.cuchost.com (172.16.6.22) To EXMBX172.cuchost.com (172.16.6.92) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Mon, 13 Nov 2023 18:15:49 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782503919374810384 X-GMAIL-MSGID: 1782503919374810384 Add device tree binding for StarFive's StarLink PMU (Performance Monitor Unit). Signed-off-by: Ji Sheng Teoh --- .../bindings/perf/starfive,starlink-pmu.yaml | 46 +++++++++++++++++++ 1 file changed, 46 insertions(+) create mode 100644 Documentation/devicetree/bindings/perf/starfive,starlink-pmu.yaml diff --git a/Documentation/devicetree/bindings/perf/starfive,starlink-pmu.yaml b/Documentation/devicetree/bindings/perf/starfive,starlink-pmu.yaml new file mode 100644 index 000000000000..b164f6849055 --- /dev/null +++ b/Documentation/devicetree/bindings/perf/starfive,starlink-pmu.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/perf/starfive,starlink-pmu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: StarFive StarLink PMU + +maintainers: + - Ji Sheng Teoh + +description: + StarFive's StarLink PMU integrates one or more CPU cores with a shared L3 + memory system. The PMU support overflow interrupt, up to 16 programmable + 64bit event counters, and an independent 64bit cycle counter. + StarLink PMU is accessed via MMIO. + +properties: + compatible: + const: starfive,starlink-pmu + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + soc { + #address-cells = <2>; + #size-cells = <2>; + + l3_pmu: pmu@12900000 { + compatible = "starfive,starlink-pmu"; + reg = <0x0 0x12900000 0x0 0x10000>; + interrupts = <34>; + }; + };