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Tue, 14 Nov 2023 02:14:51 -0800 (PST) From: Neil Armstrong Date: Tue, 14 Nov 2023 11:14:45 +0100 Subject: [PATCH 3/3] clk: meson: g12a: add CSI & ISP gates clocks MIME-Version: 1.0 Message-Id: <20231114-topic-amlogic-upstream-isp-clocks-v1-3-223958791501@linaro.org> References: <20231114-topic-amlogic-upstream-isp-clocks-v1-0-223958791501@linaro.org> In-Reply-To: <20231114-topic-amlogic-upstream-isp-clocks-v1-0-223958791501@linaro.org> To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jerome Brunet , Kevin Hilman , Martin Blumenstingl Cc: Daniel Scally , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, Neil Armstrong X-Mailer: b4 0.12.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=1776; i=neil.armstrong@linaro.org; h=from:subject:message-id; bh=G6Kb72oGcBrPLl5eFs681WZSIgqU+YTJL+dNbC8hxWs=; b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBlU0iXw3tWEkFljMjnl008PiXXewEGfT3AHYBO+Wi+ sQAl3i+JAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCZVNIlwAKCRB33NvayMhJ0QufD/ 0ceRMlDLWS+bur9qzpxRCQm4JTKJ6Kx+cIpmoZWH64KiPe9srQxK38q/CKawXo+wQvZjc1gWV+ldur BgqhGY/VxsjAwt8p+FO7NT8BotOl5Xhh9U4gbEf2DJqMUYjcZx7gLBrpWFNMFLId9cEXCdrmAbo7G/ UfeW+cHrY5rOCkSvtcAWFUE12xUANkKlU/8VB/51OUcvrS4iyymlxA2qV6EKltNwJRTdLtuMBMFzHT 0HzZH7C8MObagKeOiWT3MH4g8tk/sJk98dB3NkL1BH3p7NxCRc9Nsswrtw20S+Nn05Usfvty8mLEeY ugjrfY0vyBqZMqmrMxhApo6gmLeex65PpEjR+z7LENPXc46UoAel7LI5fV/y5HOlT+erymy1vPVf+S JSOSn1rJ/ESZMYCgdECBtjFXqbAwMt/qDb/NvLD4elGmYYPnbx2z7pytzdidK5CBvvsMYxjbsn3DDU WUMUXuwwPY2QNnFpxLic0Obir+1TsIsu+IcS5fnHPf2+2VRRLS27gijuuYvWrJl9GWCDRDqnC+8gIR JDuC2awJSuWNOfb//BOiZmN4H+6CyG0ARxAEfvdU2AXfaBC/tXnthHtxvVhHZFJeWAi1iN80IWqaYJ tMAOb2UldwqlNqZ1XqH2gzxt2oofds639E4P1jOIzqN0dGsX6tCB85evzSlQ== X-Developer-Key: i=neil.armstrong@linaro.org; a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Tue, 14 Nov 2023 02:15:51 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782534086891700786 X-GMAIL-MSGID: 1782534086891700786 Add the gates entires for the CSI ISP domain and CSI PHYs. Signed-off-by: Neil Armstrong --- drivers/clk/meson/g12a.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/clk/meson/g12a.c b/drivers/clk/meson/g12a.c index a8312f29d1cc..b0bd37ae1a81 100644 --- a/drivers/clk/meson/g12a.c +++ b/drivers/clk/meson/g12a.c @@ -4274,9 +4274,12 @@ static MESON_GATE(g12a_htx_hdcp22, HHI_GCLK_MPEG2, 3); static MESON_GATE(g12a_htx_pclk, HHI_GCLK_MPEG2, 4); static MESON_GATE(g12a_bt656, HHI_GCLK_MPEG2, 6); static MESON_GATE(g12a_usb1_to_ddr, HHI_GCLK_MPEG2, 8); +static MESON_GATE(g12b_mipi_isp_gate, HHI_GCLK_MPEG2, 17); static MESON_GATE(g12a_mmc_pclk, HHI_GCLK_MPEG2, 11); static MESON_GATE(g12a_uart2, HHI_GCLK_MPEG2, 15); static MESON_GATE(g12a_vpu_intr, HHI_GCLK_MPEG2, 25); +static MESON_GATE(g12b_csi_phy1, HHI_GCLK_MPEG2, 28); +static MESON_GATE(g12b_csi_phy0, HHI_GCLK_MPEG2, 29); static MESON_GATE(g12a_gic, HHI_GCLK_MPEG2, 30); static MESON_GATE(g12a_vclk2_venci0, HHI_GCLK_OTHER, 1); @@ -4792,6 +4795,9 @@ static struct clk_hw *g12b_hw_clks[] = { [CLKID_MIPI_ISP_SEL] = &g12b_mipi_isp_sel.hw, [CLKID_MIPI_ISP_DIV] = &g12b_mipi_isp_div.hw, [CLKID_MIPI_ISP] = &g12b_mipi_isp.hw, + [CLKID_MIPI_ISP_GATE] = &g12b_mipi_isp_gate.hw, + [CLKID_MIPI_ISP_CSI_PHY0] = &g12b_csi_phy0.hw, + [CLKID_MIPI_ISP_CSI_PHY1] = &g12b_csi_phy1.hw, }; static struct clk_hw *sm1_hw_clks[] = { @@ -5287,6 +5293,9 @@ static struct clk_regmap *const g12a_clk_regmaps[] = { &g12b_mipi_isp_sel, &g12b_mipi_isp_div, &g12b_mipi_isp, + &g12b_mipi_isp_gate, + &g12b_csi_phy1, + &g12b_csi_phy0, }; static const struct reg_sequence g12a_init_regs[] = {