Message ID | 20231113005503.2423-4-jszhang@kernel.org |
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State | New |
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[2620:137:e000::3:7]) by mx.google.com with ESMTPS id my1-20020a17090b4c8100b0027d37bb12a6si4887230pjb.49.2023.11.12.17.07.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 12 Nov 2023 17:07:53 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) client-ip=2620:137:e000::3:7; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=uQezJXBf; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id 6C5C480A5F5B; Sun, 12 Nov 2023 17:07:52 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232799AbjKMBHs (ORCPT <rfc822;lhua1029@gmail.com> + 30 others); Sun, 12 Nov 2023 20:07:48 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55322 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232755AbjKMBHo (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Sun, 12 Nov 2023 20:07:44 -0500 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0031E1FFB for <linux-kernel@vger.kernel.org>; Sun, 12 Nov 2023 17:07:41 -0800 (PST) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 41267C433CB; Mon, 13 Nov 2023 01:07:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1699837661; bh=FU5cMxpykFA89J/z1Xx5vbxIOEU9bDayGjmJTED/4UY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=uQezJXBfixXFEnDr2uPowPMWRFtaZ5r1q34O5kMOfhXgqt6xRQJok/YdVKhr753Sc U3brf0s5laXn8qH+WlE5rwINpOTqG7YY5Gf+KvG7ZuE5RAyC4QMGnW7qPhkbtsI73i LOgFM2tUGynRSL8KRffQbgT3N+4ali7B0V4blEFMYQcYw6R2gfBJbjiQcU+4vHywGL rSuLw91jQFndlfabvrHICBhGjhAOdvNpgyWQC1JDvxgIBBNYQI/6GODycyIxNxpJWx hRWvuIIn2U2/HUSuhFuaw5nsb+TkehY43Oq1390yw7oCoKg0AiXMDqcPh15OhD3Sg/ 6E0laeQm1YkTw== From: Jisheng Zhang <jszhang@kernel.org> To: Philipp Zabel <p.zabel@pengutronix.de>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Chao Wei <chao.wei@sophgo.com>, Chen Wang <unicorn_wang@outlook.com> Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH 3/4] riscv: dts: sophgo: add reset dt node for cv1800b Date: Mon, 13 Nov 2023 08:55:02 +0800 Message-Id: <20231113005503.2423-4-jszhang@kernel.org> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20231113005503.2423-1-jszhang@kernel.org> References: <20231113005503.2423-1-jszhang@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Sun, 12 Nov 2023 17:07:52 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782408988374532823 X-GMAIL-MSGID: 1782408988374532823 |
Series |
riscv: sophgo: add reset support for cv1800b
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Commit Message
Jisheng Zhang
Nov. 13, 2023, 12:55 a.m. UTC
Add the reset device tree node to cv1800b SoC.
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
---
arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
Comments
Hi Jisheng: On 08:55 Mon 13 Nov , Jisheng Zhang wrote: > Add the reset device tree node to cv1800b SoC. > > Signed-off-by: Jisheng Zhang <jszhang@kernel.org> > --- > arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi > index df40e87ee063..4032419486be 100644 > --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi > +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi > @@ -54,6 +54,12 @@ soc { > dma-noncoherent; > ranges; > > + rst: reset-controller@3003000 { > + compatible = "sophgo,cv1800b-reset"; > + reg = <0x03003000 0x1000>; ~~~~~~~ it should be 0x28 while please also note the 0x24 == SOFT_CPUAC_RSTN, does not compatible with the reset-simple driver, but as it's not implemented nor used in this driver, so we should be fine with this? > + #reset-cells = <1>; > + }; > + > uart0: serial@4140000 { > compatible = "snps,dw-apb-uart"; > reg = <0x04140000 0x100>; > -- > 2.42.0 >
On Mon, Nov 13, 2023 at 02:32:24PM +0000, Yixun Lan wrote: > Hi Jisheng: Hi > > On 08:55 Mon 13 Nov , Jisheng Zhang wrote: > > Add the reset device tree node to cv1800b SoC. > > > > Signed-off-by: Jisheng Zhang <jszhang@kernel.org> > > --- > > arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 6 ++++++ > > 1 file changed, 6 insertions(+) > > > > diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi > > index df40e87ee063..4032419486be 100644 > > --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi > > +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi > > @@ -54,6 +54,12 @@ soc { > > dma-noncoherent; > > ranges; > > > > + rst: reset-controller@3003000 { > > + compatible = "sophgo,cv1800b-reset"; > > + reg = <0x03003000 0x1000>; > ~~~~~~~ > it should be 0x28 The reg space is 4KB, but only 0x28 are used. I think 0x1000 or 0x28 are fine since the ioremap granule is 4kB. > > while please also note the 0x24 == SOFT_CPUAC_RSTN, does not compatible > with the reset-simple driver, but as it's not implemented nor used in this driver, But the functionality of this "autoclear" reg isn't used at all since we also have "sticky" reset to acchieve the same feature, I.E reset cpusys. And in the usage case of reseting cpusys, I believe "sticky" reset is preferred. And except the cpusys reset which has both autoclear and sticky, other resets are sticky only. I'm not sure whether it's worth to write a new driver for almost useless feature. > so we should be fine with this? > > > + #reset-cells = <1>; > > + }; > > + > > uart0: serial@4140000 { > > compatible = "snps,dw-apb-uart"; > > reg = <0x04140000 0x100>; > > -- > > 2.42.0 > > > > -- > Yixun Lan (dlan) > Gentoo Linux Developer > GPG Key ID AABEFD55
Hi Jisheng, On 2023-11-13 9:14 AM, Jisheng Zhang wrote: > On Mon, Nov 13, 2023 at 02:32:24PM +0000, Yixun Lan wrote: >> On 08:55 Mon 13 Nov , Jisheng Zhang wrote: >>> Add the reset device tree node to cv1800b SoC. >>> >>> Signed-off-by: Jisheng Zhang <jszhang@kernel.org> >>> --- >>> arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 6 ++++++ >>> 1 file changed, 6 insertions(+) >>> >>> diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi >>> index df40e87ee063..4032419486be 100644 >>> --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi >>> +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi >>> @@ -54,6 +54,12 @@ soc { >>> dma-noncoherent; >>> ranges; >>> >>> + rst: reset-controller@3003000 { >>> + compatible = "sophgo,cv1800b-reset"; >>> + reg = <0x03003000 0x1000>; >> ~~~~~~~ >> it should be 0x28 > > The reg space is 4KB, but only 0x28 are used. I think 0x1000 or 0x28 are fine > since the ioremap granule is 4kB. >> >> while please also note the 0x24 == SOFT_CPUAC_RSTN, does not compatible >> with the reset-simple driver, but as it's not implemented nor used in this driver, > > But the functionality of this "autoclear" reg isn't used at all since we also > have "sticky" reset to acchieve the same feature, I.E reset cpusys. And in the > usage case of reseting cpusys, I believe "sticky" reset is preferred. > > And except the cpusys reset which has both autoclear and sticky, other > resets are sticky only. I'm not sure whether it's worth to write a new > driver for almost useless feature. As long as the device has its own binding/compatible string, it is always possible to replace RESET_SIMPLE with a custom driver later if needed. (Or use a more complicated driver in some other context, e.g. firmware). Regards, Samuel >> so we should be fine with this? >> >>> + #reset-cells = <1>; >>> + }; >>> + >>> uart0: serial@4140000 { >>> compatible = "snps,dw-apb-uart"; >>> reg = <0x04140000 0x100>; >>> -- >>> 2.42.0 >>> >> >> -- >> Yixun Lan (dlan) >> Gentoo Linux Developer >> GPG Key ID AABEFD55 > > _______________________________________________ > linux-riscv mailing list > linux-riscv@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-riscv
On Mon, Nov 13, 2023 at 10:37:35AM -0500, Samuel Holland wrote: > Hi Jisheng, Hi Samuel, > > On 2023-11-13 9:14 AM, Jisheng Zhang wrote: > > On Mon, Nov 13, 2023 at 02:32:24PM +0000, Yixun Lan wrote: > >> On 08:55 Mon 13 Nov , Jisheng Zhang wrote: > >>> Add the reset device tree node to cv1800b SoC. > >>> > >>> Signed-off-by: Jisheng Zhang <jszhang@kernel.org> > >>> --- > >>> arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 6 ++++++ > >>> 1 file changed, 6 insertions(+) > >>> > >>> diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi > >>> index df40e87ee063..4032419486be 100644 > >>> --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi > >>> +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi > >>> @@ -54,6 +54,12 @@ soc { > >>> dma-noncoherent; > >>> ranges; > >>> > >>> + rst: reset-controller@3003000 { > >>> + compatible = "sophgo,cv1800b-reset"; > >>> + reg = <0x03003000 0x1000>; > >> ~~~~~~~ > >> it should be 0x28 > > > > The reg space is 4KB, but only 0x28 are used. I think 0x1000 or 0x28 are fine > > since the ioremap granule is 4kB. > >> > >> while please also note the 0x24 == SOFT_CPUAC_RSTN, does not compatible > >> with the reset-simple driver, but as it's not implemented nor used in this driver, > > > > But the functionality of this "autoclear" reg isn't used at all since we also > > have "sticky" reset to acchieve the same feature, I.E reset cpusys. And in the > > usage case of reseting cpusys, I believe "sticky" reset is preferred. > > > > And except the cpusys reset which has both autoclear and sticky, other > > resets are sticky only. I'm not sure whether it's worth to write a new > > driver for almost useless feature. > > As long as the device has its own binding/compatible string, it is always > possible to replace RESET_SIMPLE with a custom driver later if needed. (Or use a > more complicated driver in some other context, e.g. firmware). Good idea, indeed if needed we can implement a customized driver, and I think this can acchieve both backward and forward DT compatbility ;) As for firmware, I guess you mean the little c906 core os firmware. Here is my draft plan: a sophgo custom remoteproc driver which will do something like: load the firmware; reset_assert(rst); prepara cpu entry address and so on; reset_deassert(rst); so sticky reset still works perfectly. While I believe autoclear reset may not work if the reset clears something we have set. > > Regards, > Samuel > > >> so we should be fine with this? > >> > >>> + #reset-cells = <1>; > >>> + }; > >>> + > >>> uart0: serial@4140000 { > >>> compatible = "snps,dw-apb-uart"; > >>> reg = <0x04140000 0x100>; > >>> -- > >>> 2.42.0 > >>> > >> > >> -- > >> Yixun Lan (dlan) > >> Gentoo Linux Developer > >> GPG Key ID AABEFD55 > > > > _______________________________________________ > > linux-riscv mailing list > > linux-riscv@lists.infradead.org > > http://lists.infradead.org/mailman/listinfo/linux-riscv >
diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi index df40e87ee063..4032419486be 100644 --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi @@ -54,6 +54,12 @@ soc { dma-noncoherent; ranges; + rst: reset-controller@3003000 { + compatible = "sophgo,cv1800b-reset"; + reg = <0x03003000 0x1000>; + #reset-cells = <1>; + }; + uart0: serial@4140000 { compatible = "snps,dw-apb-uart"; reg = <0x04140000 0x100>;