Message ID | 20231108213734.140707-1-alpernebiyasak@gmail.com |
---|---|
State | New |
Headers |
Return-Path: <linux-kernel-owner@vger.kernel.org> Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:b129:0:b0:403:3b70:6f57 with SMTP id q9csp58930vqs; Wed, 8 Nov 2023 13:38:19 -0800 (PST) X-Google-Smtp-Source: AGHT+IEv4Lde67BM+U35x59sKTwH1KKBJwHHtvNGo7PSZmnBN7CBB4k7WBCqMxUatRebQNp/J2DU X-Received: by 2002:a17:902:b613:b0:1cc:5e1b:98a7 with SMTP id b19-20020a170902b61300b001cc5e1b98a7mr2921098pls.45.1699479498966; Wed, 08 Nov 2023 13:38:18 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1699479498; cv=none; d=google.com; s=arc-20160816; b=bjj6XmLpzzpnT7yNxkREBDnQRqGhPEbD6+UwT/cU6sSc11gBq7MiV2OuHYZ1jfojY4 OC9VxBbsHqIpbvLozUjOOMvqNe9Qj+NHe8+R0zDloquiYEOU12T69F38c3mOcTY7FaMc QbTU3OESfs0fgSzOM9FfuY+xE3PBdjMrc3MfiZ0spHh0qYYuL3IRVvYAUk8YTGNW4UrY jyAZiXhTUgNpfxUuQQHEf8lQW7bdB7qPkDnmOn9Nod0TcKNdwl7GOHvF1eW+YrsrYqCl u8KUWfK4rBxJDWt61PXAQMpYp9UEH9EojL4xjDawKrLtvIxXECkUwbGkKhfTcugQYhdG 7OIQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=BOY/4TbWJlIh9l54tUoY6OQMnJji9pbyz4aczXm5Onw=; fh=28uOPfAhhyP3TKtGWMGAXehJSxdWFret9WUsI7paRBI=; b=PXknQtaKL+XpvoiNkBC9Vn/pOU+ERW3r3W0/960obNY5KccWaMia+bet/BEG3CPA40 bojN0nvLnMqmy9I+XTngh5gjPqeKQwdrEN7YFAkfqCNR2LPaGp5GtG+5OIRdu09mdkV9 AQK3jsWZ+uE1lIbo4SbqlvQzo7ywZiINfJqTFXUKi2eW3nrcaD1x/cFg63Gbg86/9DFe ebrxjYYfcC8pbJOOzl4L2sQt1hDGYcxGUV+SzNJtN79h4IO6Wg4GHyEhsbQihdbkOezc aMdLMgDLha5oPxivd6YYzLP0IDP0X+FKHttEV0kWVuu0t4zWIG/RViKMg6x6/5l4w7qJ RfMg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gmail.com header.s=20230601 header.b="S/5/GOx2"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from snail.vger.email (snail.vger.email. [23.128.96.37]) by mx.google.com with ESMTPS id ko5-20020a17090307c500b001cc76bea4fesi3003968plb.163.2023.11.08.13.38.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Nov 2023 13:38:18 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) client-ip=23.128.96.37; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20230601 header.b="S/5/GOx2"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id 57CD482ECB10; Wed, 8 Nov 2023 13:38:17 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.11 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230230AbjKHViR (ORCPT <rfc822;jaysivo@gmail.com> + 32 others); Wed, 8 Nov 2023 16:38:17 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42436 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229460AbjKHViP (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Wed, 8 Nov 2023 16:38:15 -0500 Received: from mail-wm1-x32f.google.com (mail-wm1-x32f.google.com [IPv6:2a00:1450:4864:20::32f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E47C12585; Wed, 8 Nov 2023 13:38:12 -0800 (PST) Received: by mail-wm1-x32f.google.com with SMTP id 5b1f17b1804b1-4079ed65471so771055e9.1; Wed, 08 Nov 2023 13:38:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1699479491; x=1700084291; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=BOY/4TbWJlIh9l54tUoY6OQMnJji9pbyz4aczXm5Onw=; b=S/5/GOx25f/cpSqx2ALbnlXIESL4uoWXxHdzjAUljfQ6z4AwCUCKE5plnVF0SG2IOE /rmxVt0BzB0E/P+DiX5O2IXiv9hgBJ/F3BHz0uIcvCzdUnjRKSwMcYWjBzdNEcM2RmAt 14VXcVs6E3ZERKlEs7iCQ4M8u7NFhlq6yV+CjgSjRgcvMa3o7fgFD7hucF97bQBkRWmw HBpVl6+od7rY0m6sqGjp3eVT/S+rVdT3DsS84hrQhEiXNyd4uVimSGekGBPpHShWotuX WaPhSWsRMnC8/X0T9O1YacMFSAZssGygPXmcaSmKz9nVXQ6Zmq8fHjol3oCSKCFb0sH2 0OMw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1699479491; x=1700084291; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=BOY/4TbWJlIh9l54tUoY6OQMnJji9pbyz4aczXm5Onw=; b=YFKQbBqKpqVAKsMflYbqXGG53kzZJJEf6WOJIupAblWrBbNRPRhC9L2XHeyrMALiD8 yuhbE7NcTPMurAwdXQVbBI6+Pf/JFscGP72BNQlN6Ra4PH3EbkgKxuP8jWL9Upx1MdmZ +SNTA3D/XWiwH/MGojc691Vw56A/BYdlPpY1skiRG5XLewdWPC1ZN0DVp1DbxdnWRhLa Phz9V/kg6PbTYerG875uXxsULh6s5mrDYE4VDULTY8TTRrpnkTtjAwN6fe2K0xhk9i4F jw4hil/QO/Y0IkwnPhlnxyFLgvb7a1Ipi9BZtTw0zyU4GcUcDo2TDrqsN0TWa0F0fZI5 psag== X-Gm-Message-State: AOJu0Yy1kq4buDm5TYehAE6pNC3OaYZr7kohBRMt/p+YNvq9RsfoLPmg 5Bu30HE9M39I/gNQPPyNpIq9yHsXrSI= X-Received: by 2002:a05:600c:3b96:b0:407:8ee2:997e with SMTP id n22-20020a05600c3b9600b004078ee2997emr2777339wms.27.1699479491088; Wed, 08 Nov 2023 13:38:11 -0800 (PST) Received: from ALPER-PC.. ([178.233.24.52]) by smtp.gmail.com with ESMTPSA id u8-20020a05600c138800b004075d5664basm22032wmf.8.2023.11.08.13.38.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Nov 2023 13:38:10 -0800 (PST) From: Alper Nebi Yasak <alpernebiyasak@gmail.com> To: linux-kernel@vger.kernel.org Cc: =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= <u.kleine-koenig@pengutronix.de>, Stephen Boyd <sboyd@kernel.org>, linux-clk@vger.kernel.org, Chen-Yu Tsai <wenst@chromium.org>, linux-arm-kernel@lists.infradead.org, Michael Turquette <mturquette@baylibre.com>, Matthias Brugger <matthias.bgg@gmail.com>, linux-mediatek@lists.infradead.org, AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>, Alper Nebi Yasak <alpernebiyasak@gmail.com> Subject: [PATCH] clock: mediatek: mt8173: Handle unallocated infracfg clock data Date: Thu, 9 Nov 2023 00:33:43 +0300 Message-ID: <20231108213734.140707-1-alpernebiyasak@gmail.com> X-Mailer: git-send-email 2.42.0 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Wed, 08 Nov 2023 13:38:17 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1782033415194457794 X-GMAIL-MSGID: 1782033415194457794 |
Series |
clock: mediatek: mt8173: Handle unallocated infracfg clock data
|
|
Commit Message
Alper Nebi Yasak
Nov. 8, 2023, 9:33 p.m. UTC
The MT8173 infracfg clock driver does initialization in two steps, via a
CLK_OF_DECLARE_DRIVER declaration. However its early init function
doesn't get to run when it's built as a module, presumably since it's
not loaded by the time it would have been called by of_clk_init(). This
causes its second-step probe() to return -ENOMEM when trying to register
clocks, as the necessary clock_data struct isn't initialized by the
first step.
MT2701 and MT6797 clock drivers also use this mechanism, but they try to
allocate the necessary clock_data structure if missing in the second
step. Mimic that for the MT8173 infracfg clock as well to make it work
as a module.
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
---
I've tried adding cpumux support to clk-mtk.c then switching this over
to simple probe functions and it appears to work for me, though I don't
know clock systems enough to recognize if it's subtly broken instead.
That'd remove this piece of code, but this might still be worth applying
to backport to stable kernels.
If I'm reading things correctly, it looks like it would be possible to
add cpumux & pll & pllfh support to clk-mtk.c, then move most if not
every driver to simple probe, with one file per clock and module
support. How much of that is desirable? In what order do the parts need
to be registered?
drivers/clk/mediatek/clk-mt8173-infracfg.c | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
base-commit: 2220f68f4504aa1ccce0fac721ccdb301e9da32f
Comments
Il 08/11/23 22:33, Alper Nebi Yasak ha scritto: > The MT8173 infracfg clock driver does initialization in two steps, via a > CLK_OF_DECLARE_DRIVER declaration. However its early init function > doesn't get to run when it's built as a module, presumably since it's > not loaded by the time it would have been called by of_clk_init(). This > causes its second-step probe() to return -ENOMEM when trying to register > clocks, as the necessary clock_data struct isn't initialized by the > first step. > > MT2701 and MT6797 clock drivers also use this mechanism, but they try to > allocate the necessary clock_data structure if missing in the second > step. Mimic that for the MT8173 infracfg clock as well to make it work > as a module. > > Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> > --- > I've tried adding cpumux support to clk-mtk.c then switching this over > to simple probe functions and it appears to work for me, though I don't > know clock systems enough to recognize if it's subtly broken instead. > That'd remove this piece of code, but this might still be worth applying > to backport to stable kernels. > > If I'm reading things correctly, it looks like it would be possible to > add cpumux & pll & pllfh support to clk-mtk.c, then move most if not > every driver to simple probe, with one file per clock and module > support. How much of that is desirable? In what order do the parts need > to be registered? > Thing is, if (!infra_clk_data) at infracfg_probe time, then INFRA_CLK_13M==-ENOENT! If you do this, you should at least also send a devicetree commit that adds clk13m: fixed-factor-clock-13m { compatible = "fixed-factor-clock"; #clock-cells = <0>; clocks = <&clk26m>; clock-div = <2>; clock-mult = <1>; clock-output-names = "clk13m"; }; ....otherwise this solution is incomplete! ;-) Regarding the CPUMUX support, when I've restructured the MediaTek clocks, I've also been thinking about doing this, but decided not to do it because that'd be a check done on ~10 clock drivers per SoC, of which only one is expected to succeed... I see that as a waste of cycles at boot... ...but if anyone thinks otherwise, I'm fine with it... Anyway. Can you please fix the commit title to be consistent with the others and send a v2? In this case, that would be "clk: mediatek: mt8173-infracfg: Handle unallocated infracfg when module" P.S.: Good job! Cheers, Angelo > drivers/clk/mediatek/clk-mt8173-infracfg.c | 12 +++++++++++- > 1 file changed, 11 insertions(+), 1 deletion(-) > > diff --git a/drivers/clk/mediatek/clk-mt8173-infracfg.c b/drivers/clk/mediatek/clk-mt8173-infracfg.c > index 2f2f074e231a..ecc8b0063ea5 100644 > --- a/drivers/clk/mediatek/clk-mt8173-infracfg.c > +++ b/drivers/clk/mediatek/clk-mt8173-infracfg.c > @@ -98,7 +98,17 @@ CLK_OF_DECLARE_DRIVER(mtk_infrasys, "mediatek,mt8173-infracfg", > static int clk_mt8173_infracfg_probe(struct platform_device *pdev) > { > struct device_node *node = pdev->dev.of_node; > - int r; > + int r, i; > + > + if (!infra_clk_data) { > + infra_clk_data = mtk_alloc_clk_data(CLK_INFRA_NR_CLK); > + if (!infra_clk_data) > + return -ENOMEM; > + } else { > + for (i = 0; i < CLK_INFRA_NR_CLK; i++) > + if (infra_clk_data->hws[i] == ERR_PTR(-EPROBE_DEFER)) > + infra_clk_data->hws[i] = ERR_PTR(-ENOENT); > + } > > r = mtk_clk_register_gates(&pdev->dev, node, infra_gates, > ARRAY_SIZE(infra_gates), infra_clk_data); > > base-commit: 2220f68f4504aa1ccce0fac721ccdb301e9da32f
Hi, Sorry with the late reply. I am trying to get things enabled in Debian for MT8173 and MT8183 Chromebooks, and needed to post this so I can refer to this there [1]. Then I worked on things related to that, hence the delay. Replying here mostly because I wanted to tell you as you might be interested -- although I do have some module probe ordering problems that could use some insight... [1] https://salsa.debian.org/kernel-team/linux/-/merge_requests/906 On 2023-11-09 12:05 +03:00, AngeloGioacchino Del Regno wrote: > Il 08/11/23 22:33, Alper Nebi Yasak ha scritto: >> The MT8173 infracfg clock driver does initialization in two steps, via a >> CLK_OF_DECLARE_DRIVER declaration. However its early init function >> doesn't get to run when it's built as a module, presumably since it's >> not loaded by the time it would have been called by of_clk_init(). This >> causes its second-step probe() to return -ENOMEM when trying to register >> clocks, as the necessary clock_data struct isn't initialized by the >> first step. >> >> MT2701 and MT6797 clock drivers also use this mechanism, but they try to >> allocate the necessary clock_data structure if missing in the second >> step. Mimic that for the MT8173 infracfg clock as well to make it work >> as a module. >> >> Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com> >> --- >> I've tried adding cpumux support to clk-mtk.c then switching this over >> to simple probe functions and it appears to work for me, though I don't >> know clock systems enough to recognize if it's subtly broken instead. >> That'd remove this piece of code, but this might still be worth applying >> to backport to stable kernels. >> >> If I'm reading things correctly, it looks like it would be possible to >> add cpumux & pll & pllfh support to clk-mtk.c, then move most if not >> every driver to simple probe, with one file per clock and module >> support. How much of that is desirable? In what order do the parts need >> to be registered? > > Thing is, if (!infra_clk_data) at infracfg_probe time, then INFRA_CLK_13M==-ENOENT! > If you do this, you should at least also send a devicetree commit that adds > > clk13m: fixed-factor-clock-13m { > compatible = "fixed-factor-clock"; > #clock-cells = <0>; > clocks = <&clk26m>; > clock-div = <2>; > clock-mult = <1>; > clock-output-names = "clk13m"; > }; > > ....otherwise this solution is incomplete! ;-) I'm seeing similar blocks added for other SoCs and tried to match what they did, hoping it's correct for MT8173 as well. > Regarding the CPUMUX support, when I've restructured the MediaTek clocks, I've also > been thinking about doing this, but decided not to do it because that'd be a check > done on ~10 clock drivers per SoC, of which only one is expected to succeed... I > see that as a waste of cycles at boot... > > ...but if anyone thinks otherwise, I'm fine with it... Thanks for making it possible to use them as modules, I appreciate it! It does look like a maintainability vs performance trade off, and I don't know enough about performance profiling to say it doesn't matter here. > Anyway. > > Can you please fix the commit title to be consistent with the others and send a v2? > > In this case, that would be > "clk: mediatek: mt8173-infracfg: Handle unallocated infracfg when module" Heh, I'm having trouble with titles recently. Sent a v2 just now, with a second patch for device-tree. > P.S.: Good job! > > Cheers, > Angelo > >> drivers/clk/mediatek/clk-mt8173-infracfg.c | 12 +++++++++++- >> 1 file changed, 11 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/clk/mediatek/clk-mt8173-infracfg.c b/drivers/clk/mediatek/clk-mt8173-infracfg.c >> index 2f2f074e231a..ecc8b0063ea5 100644 >> --- a/drivers/clk/mediatek/clk-mt8173-infracfg.c >> +++ b/drivers/clk/mediatek/clk-mt8173-infracfg.c >> @@ -98,7 +98,17 @@ CLK_OF_DECLARE_DRIVER(mtk_infrasys, "mediatek,mt8173-infracfg", >> static int clk_mt8173_infracfg_probe(struct platform_device *pdev) >> { >> struct device_node *node = pdev->dev.of_node; >> - int r; >> + int r, i; >> + >> + if (!infra_clk_data) { >> + infra_clk_data = mtk_alloc_clk_data(CLK_INFRA_NR_CLK); >> + if (!infra_clk_data) >> + return -ENOMEM; >> + } else { >> + for (i = 0; i < CLK_INFRA_NR_CLK; i++) >> + if (infra_clk_data->hws[i] == ERR_PTR(-EPROBE_DEFER)) >> + infra_clk_data->hws[i] = ERR_PTR(-ENOENT); >> + } >> >> r = mtk_clk_register_gates(&pdev->dev, node, infra_gates, >> ARRAY_SIZE(infra_gates), infra_clk_data); >> >> base-commit: 2220f68f4504aa1ccce0fac721ccdb301e9da32f
diff --git a/drivers/clk/mediatek/clk-mt8173-infracfg.c b/drivers/clk/mediatek/clk-mt8173-infracfg.c index 2f2f074e231a..ecc8b0063ea5 100644 --- a/drivers/clk/mediatek/clk-mt8173-infracfg.c +++ b/drivers/clk/mediatek/clk-mt8173-infracfg.c @@ -98,7 +98,17 @@ CLK_OF_DECLARE_DRIVER(mtk_infrasys, "mediatek,mt8173-infracfg", static int clk_mt8173_infracfg_probe(struct platform_device *pdev) { struct device_node *node = pdev->dev.of_node; - int r; + int r, i; + + if (!infra_clk_data) { + infra_clk_data = mtk_alloc_clk_data(CLK_INFRA_NR_CLK); + if (!infra_clk_data) + return -ENOMEM; + } else { + for (i = 0; i < CLK_INFRA_NR_CLK; i++) + if (infra_clk_data->hws[i] == ERR_PTR(-EPROBE_DEFER)) + infra_clk_data->hws[i] = ERR_PTR(-ENOENT); + } r = mtk_clk_register_gates(&pdev->dev, node, infra_gates, ARRAY_SIZE(infra_gates), infra_clk_data);