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[2620:137:e000::3:7]) by mx.google.com with ESMTPS id u19-20020aa78493000000b006b6119c4695si7928852pfn.380.2023.11.06.06.23.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Nov 2023 06:23:55 -0800 (PST) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) client-ip=2620:137:e000::3:7; Authentication-Results: mx.google.com; dkim=pass header.i=@foss.st.com header.s=selector1 header.b=QYI44LuX; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:7 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=foss.st.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by snail.vger.email (Postfix) with ESMTP id 826F4802885B; Mon, 6 Nov 2023 06:23:54 -0800 (PST) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at snail.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230155AbjKFOXn (ORCPT + 35 others); Mon, 6 Nov 2023 09:23:43 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49368 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229485AbjKFOXk (ORCPT ); Mon, 6 Nov 2023 09:23:40 -0500 Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 05132BF; Mon, 6 Nov 2023 06:23:36 -0800 (PST) Received: from pps.filterd (m0046660.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3A6CfNux000794; Mon, 6 Nov 2023 15:23:18 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=foss.st.com; h= from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding:content-type; s= selector1; bh=rkHoTntJC29nPNdgPKNfEyJLt/Ru5H+gyk6qO+rfScA=; b=QY I44LuXgG73qkryyh4Hsg/VKOdU394M74DkwKqniOXP4QENujMjGBcnE0Pyq4xJ1K xsePpe3xYoUPTkWWnPzHfMQnaAX/u0PPHWj1i1gpC4/BeK6mXar3zM3YH4qL9cgN UxEuCXiRWQPTuMYd3SAdCivti6XK1MVZPHshHSZ2IfeZI9wY8Nf7dwCgtVtIXodT AmuS11NAqXy8+yoD3RLYN8EkIyf5uOvXjY80gUttnyxrJWnFuzpX4iKdqg/3v/MV 12HF5LBG1aDm48SdOUY+AEQ/Tdhh6WP4VMxNjZPKRjS2sG0+MXX4eKJfg9YfHD7f abEEjP1vPZiqtwlAbSCg== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com (PPS) with ESMTPS id 3u5eqrqhgk-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 06 Nov 2023 15:23:18 +0100 (CET) Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 964B710005E; Mon, 6 Nov 2023 15:23:17 +0100 (CET) Received: from Webmail-eu.st.com (shfdag1node1.st.com [10.75.129.69]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 8DFAC257A92; Mon, 6 Nov 2023 15:23:17 +0100 (CET) Received: from localhost (10.201.21.240) by SHFDAG1NODE1.st.com (10.75.129.69) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Mon, 6 Nov 2023 15:23:17 +0100 From: To: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Maxime Coquelin , Alexandre Torgue , Philipp Zabel , Gabriel Fernandez CC: , , , , Subject: [PATCH 3/4] clk: stm32mp1: move stm32mp1 clock driver into stm32 directory Date: Mon, 6 Nov 2023 15:18:44 +0100 Message-ID: <20231106141845.102648-4-gabriel.fernandez@foss.st.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231106141845.102648-1-gabriel.fernandez@foss.st.com> References: <20231106141845.102648-1-gabriel.fernandez@foss.st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.21.240] X-ClientProxiedBy: EQNCAS1NODE4.st.com (10.75.129.82) To SHFDAG1NODE1.st.com (10.75.129.69) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-11-06_12,2023-11-02_03,2023-05-22_02 X-Spam-Status: No, score=-2.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Mon, 06 Nov 2023 06:23:54 -0800 (PST) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781824891099867779 X-GMAIL-MSGID: 1781824891099867779 From: Gabriel Fernandez Move all STM32MP clock drivers into same directory (stm32). Signed-off-by: Gabriel Fernandez --- drivers/clk/Kconfig | 4 ---- drivers/clk/Makefile | 1 - drivers/clk/stm32/Kconfig | 7 +++++++ drivers/clk/stm32/Makefile | 1 + drivers/clk/{ => stm32}/clk-stm32mp1.c | 0 5 files changed, 8 insertions(+), 5 deletions(-) rename drivers/clk/{ => stm32}/clk-stm32mp1.c (100%) diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index 61a68a241152..472bf4a43ce5 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -414,10 +414,6 @@ config COMMON_CLK_VC7 Renesas Versaclock7 is a family of configurable clock generator and jitter attenuator ICs with fractional and integer dividers. -config COMMON_CLK_STM32MP157 - def_bool COMMON_CLK && MACH_STM32MP157 - help - Support for stm32mp157 SoC family clocks config COMMON_CLK_STM32F def_bool COMMON_CLK && (MACH_STM32F429 || MACH_STM32F469 || MACH_STM32F746) diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index ed71f2e0ee36..14fa8d4ecc1f 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -70,7 +70,6 @@ obj-$(CONFIG_COMMON_CLK_SI570) += clk-si570.o obj-$(CONFIG_COMMON_CLK_SP7021) += clk-sp7021.o obj-$(CONFIG_COMMON_CLK_STM32F) += clk-stm32f4.o obj-$(CONFIG_COMMON_CLK_STM32H7) += clk-stm32h7.o -obj-$(CONFIG_COMMON_CLK_STM32MP157) += clk-stm32mp1.o obj-$(CONFIG_COMMON_CLK_TPS68470) += clk-tps68470.o obj-$(CONFIG_CLK_TWL6040) += clk-twl6040.o obj-$(CONFIG_CLK_TWL) += clk-twl.o diff --git a/drivers/clk/stm32/Kconfig b/drivers/clk/stm32/Kconfig index 0755fbee3356..b8a34d07864c 100644 --- a/drivers/clk/stm32/Kconfig +++ b/drivers/clk/stm32/Kconfig @@ -17,6 +17,13 @@ config COMMON_CLK_STM32MP135 help Support for stm32mp13x SoC family clocks. +config COMMON_CLK_STM32MP157 + bool "Clock driver for stm32mp15x clocks" + depends on ARM || COMPILE_TEST + default y + help + Support for stm32mp15x SoC family clocks. + config COMMON_CLK_STM32MP257 bool "Clock driver for stm32mp25x clocks" depends on ARM64 || COMPILE_TEST diff --git a/drivers/clk/stm32/Makefile b/drivers/clk/stm32/Makefile index ee592f562e86..e4bcc215fdf3 100644 --- a/drivers/clk/stm32/Makefile +++ b/drivers/clk/stm32/Makefile @@ -1,2 +1,3 @@ obj-$(CONFIG_COMMON_CLK_STM32MP135) += clk-stm32mp13.o clk-stm32-core.o reset-stm32.o +obj-$(CONFIG_COMMON_CLK_STM32MP157) += clk-stm32mp1.o obj-$(CONFIG_COMMON_CLK_STM32MP257) += clk-stm32mp25.o clk-stm32-core.o reset-stm32.o diff --git a/drivers/clk/clk-stm32mp1.c b/drivers/clk/stm32/clk-stm32mp1.c similarity index 100% rename from drivers/clk/clk-stm32mp1.c rename to drivers/clk/stm32/clk-stm32mp1.c