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Sat, 04 Nov 2023 02:16:55 -0700 (PDT) From: "wuqiang.matt" To: vgupta@kernel.org, bcain@quicinc.com, jonas@southpole.se, stefan.kristiansson@saunalahti.fi, shorne@gmail.com, geert@linux-m68k.org, andi.shyti@linux.intel.com, mingo@kernel.org, palmer@rivosinc.com, andrzej.hajda@intel.com, arnd@arndb.de, peterz@infradead.orgm, mhiramat@kernel.org Cc: linux-snps-arc@lists.infradead.org, linux-kernel@vger.kernel.org, linux-hexagon@vger.kernel.org, linux-openrisc@vger.kernel.org, linux-trace-kernel@vger.kernel.org, mattwu@163.com, linux@roeck-us.ne, "wuqiang.matt" , kernel test robot Subject: [PATCH v2 4/4] locking/atomic: hexagon: arch_cmpxchg[64]_local undefined Date: Sat, 4 Nov 2023 17:16:15 +0800 Message-Id: <20231104091615.4884-5-wuqiang.matt@bytedance.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20231104091615.4884-1-wuqiang.matt@bytedance.com> References: <20231104091615.4884-1-wuqiang.matt@bytedance.com> MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_NONE,T_SCC_BODY_TEXT_LINE,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Sat, 04 Nov 2023 02:17:39 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781624461559380570 X-GMAIL-MSGID: 1781624461559380570 For architectures that support native cmpxchg, we'd like to implement arch_cmpxchg[64]_local with the native variants of supported data size. If not, the generci_cmpxchg[64]_local will be used. Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202310272207.tLPflya4-lkp@intel.com/ Signed-off-by: wuqiang.matt Reviewed-by: Masami Hiramatsu (Google) --- arch/hexagon/include/asm/cmpxchg.h | 51 +++++++++++++++++++++++++++++- 1 file changed, 50 insertions(+), 1 deletion(-) diff --git a/arch/hexagon/include/asm/cmpxchg.h b/arch/hexagon/include/asm/cmpxchg.h index bf6cf5579cf4..2b5e5bbaf807 100644 --- a/arch/hexagon/include/asm/cmpxchg.h +++ b/arch/hexagon/include/asm/cmpxchg.h @@ -8,6 +8,8 @@ #ifndef _ASM_CMPXCHG_H #define _ASM_CMPXCHG_H +#include + /* * __arch_xchg - atomically exchange a register and a memory location * @x: value to swap @@ -51,13 +53,15 @@ __arch_xchg(unsigned long x, volatile void *ptr, int size) * variable casting. */ -#define arch_cmpxchg(ptr, old, new) \ +#define __cmpxchg_32(ptr, old, new) \ ({ \ __typeof__(ptr) __ptr = (ptr); \ __typeof__(*(ptr)) __old = (old); \ __typeof__(*(ptr)) __new = (new); \ __typeof__(*(ptr)) __oldval = 0; \ \ + BUILD_BUG_ON(sizeof(*(ptr)) != 4); \ + \ asm volatile( \ "1: %0 = memw_locked(%1);\n" \ " { P0 = cmp.eq(%0,%2);\n" \ @@ -72,4 +76,49 @@ __arch_xchg(unsigned long x, volatile void *ptr, int size) __oldval; \ }) +#define __cmpxchg(ptr, old, val, size) \ +({ \ + __typeof__(*(ptr)) oldval; \ + \ + switch (size) { \ + case 4: \ + oldval = __cmpxchg_32(ptr, old, val); \ + break; \ + default: \ + BUILD_BUG(); \ + oldval = val; \ + break; \ + } \ + \ + oldval; \ +}) + +#define arch_cmpxchg(ptr, o, n) __cmpxchg((ptr), (o), (n), sizeof(*(ptr))) + +/* + * always make arch_cmpxchg[64]_local available, native cmpxchg + * will be used if available, then generic_cmpxchg[64]_local + */ +#include + +#define arch_cmpxchg_local(ptr, old, val) \ +({ \ + __typeof__(*(ptr)) retval; \ + int size = sizeof(*(ptr)); \ + \ + switch (size) { \ + case 4: \ + retval = __cmpxchg_32(ptr, old, val); \ + break; \ + default: \ + retval = __generic_cmpxchg_local(ptr, old, \ + val, size); \ + break; \ + } \ + \ + retval; \ +}) + +#define arch_cmpxchg64_local(ptr, o, n) __generic_cmpxchg64_local((ptr), (o), (n)) + #endif /* _ASM_CMPXCHG_H */