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[23.128.96.33]) by mx.google.com with ESMTPS id h2-20020a170902f54200b001cc0f6028bbsi921683plf.402.2023.10.31.04.56.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 31 Oct 2023 04:56:14 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) client-ip=23.128.96.33; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by lipwig.vger.email (Postfix) with ESMTP id E790C80310F2; Tue, 31 Oct 2023 04:55:45 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at lipwig.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344160AbjJaLzW (ORCPT + 33 others); Tue, 31 Oct 2023 07:55:22 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52368 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235341AbjJaLyt (ORCPT ); Tue, 31 Oct 2023 07:54:49 -0400 Received: from ex01.ufhost.com (ex01.ufhost.com [61.152.239.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 42F70FC; Tue, 31 Oct 2023 04:54:46 -0700 (PDT) Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id 14A2624E313; Tue, 31 Oct 2023 19:54:45 +0800 (CST) Received: from EXMBX171.cuchost.com (172.16.6.91) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Tue, 31 Oct 2023 19:54:45 +0800 Received: from ubuntu.localdomain (113.72.146.247) by EXMBX171.cuchost.com (172.16.6.91) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Tue, 31 Oct 2023 19:54:44 +0800 From: Minda Chen To: Conor Dooley , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Rob Herring , Bjorn Helgaas , Lorenzo Pieralisi , "Daire McNamara" , Emil Renner Berthing , Krzysztof Kozlowski CC: , , , , Paul Walmsley , Palmer Dabbelt , Albert Ou , Philipp Zabel , Mason Huo , Leyfoon Tan , Kevin Xie , Minda Chen Subject: [PATCH v10 14/20] PCI: microchip: Add get_events() callback function Date: Tue, 31 Oct 2023 19:54:24 +0800 Message-ID: <20231031115430.113586-15-minda.chen@starfivetech.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20231031115430.113586-1-minda.chen@starfivetech.com> References: <20231031115430.113586-1-minda.chen@starfivetech.com> MIME-Version: 1.0 X-Originating-IP: [113.72.146.247] X-ClientProxiedBy: EXCAS062.cuchost.com (172.16.6.22) To EXMBX171.cuchost.com (172.16.6.91) X-YovoleRuleAgent: yovoleflag X-Spam-Status: No, score=-0.8 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Tue, 31 Oct 2023 04:55:46 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1781272018367202616 X-GMAIL-MSGID: 1781272018367202616 PolarFire implements its own PCIe interrupts, additional to the regular PCIe interrupts, due to the lack of an MSI controller, so the interrupt to event number mapping is different to the PLDA local interrupts, necessitating a custom get_events() implementation. plda_handle_events() will call the get_events() callback function pointer directly. For the robustness of codes, add checking in plda_ init_interrupts(). Signed-off-by: Minda Chen Acked-by: Conor Dooley --- drivers/pci/controller/plda/pcie-microchip-host.c | 14 +++++++++++++- drivers/pci/controller/plda/pcie-plda.h | 8 ++++++++ 2 files changed, 21 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/plda/pcie-microchip-host.c b/drivers/pci/controller/plda/pcie-microchip-host.c index 2c03b0354f15..f5e7da242aec 100644 --- a/drivers/pci/controller/plda/pcie-microchip-host.c +++ b/drivers/pci/controller/plda/pcie-microchip-host.c @@ -657,7 +657,7 @@ static void plda_handle_event(struct irq_desc *desc) chained_irq_enter(chip, desc); - events = mc_get_events(port); + events = port->event_ops->get_events(port); for_each_set_bit(bit, &events, port->num_events) generic_handle_domain_irq(port->event_domain, bit); @@ -816,7 +816,12 @@ static int mc_request_event_irq(struct plda_pcie_rp *plda, int event_irq, 0, event_cause[event].sym, plda); } +static const struct plda_event_ops mc_event_ops = { + .get_events = mc_get_events, +}; + static const struct plda_event mc_event = { + .event_ops = &mc_event_ops, .request_event_irq = mc_request_event_irq, .intx_event = EVENT_LOCAL_PM_MSI_INT_INTX, .msi_event = EVENT_LOCAL_PM_MSI_INT_MSI, @@ -931,6 +936,11 @@ static int plda_init_interrupts(struct platform_device *pdev, int i, intx_irq, msi_irq, event_irq; int ret; + if (!event->event_ops || !event->event_ops->get_events) { + dev_err(dev, "no get events ops\n"); + return -EINVAL; + } + ret = plda_pcie_init_irq_domains(port); if (ret) { dev_err(dev, "failed creating IRQ domains\n"); @@ -941,6 +951,8 @@ static int plda_init_interrupts(struct platform_device *pdev, if (irq < 0) return -ENODEV; + port->event_ops = event->event_ops; + for (i = 0; i < port->num_events; i++) { event_irq = irq_create_mapping(port->event_domain, i); if (!event_irq) { diff --git a/drivers/pci/controller/plda/pcie-plda.h b/drivers/pci/controller/plda/pcie-plda.h index fba7343f9a96..df1729095952 100644 --- a/drivers/pci/controller/plda/pcie-plda.h +++ b/drivers/pci/controller/plda/pcie-plda.h @@ -102,6 +102,12 @@ #define EVENT_PM_MSI_INT_SYS_ERR 12 #define NUM_PLDA_EVENTS 13 +struct plda_pcie_rp; + +struct plda_event_ops { + u32 (*get_events)(struct plda_pcie_rp *pcie); +}; + struct plda_msi { struct mutex lock; /* Protect used bitmap */ struct irq_domain *msi_domain; @@ -117,11 +123,13 @@ struct plda_pcie_rp { struct irq_domain *event_domain; raw_spinlock_t lock; struct plda_msi msi; + const struct plda_event_ops *event_ops; void __iomem *bridge_addr; int num_events; }; struct plda_event { + const struct plda_event_ops *event_ops; int (*request_event_irq)(struct plda_pcie_rp *pcie, int event_irq, int event); int intx_event;