Message ID | 20231030063652.68675-15-nikunj@amd.com |
---|---|
State | New |
Headers |
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Series |
Add Secure TSC support for SNP guests
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Commit Message
Nikunj A. Dadhania
Oct. 30, 2023, 6:36 a.m. UTC
Now that all the required plumbing is done for enabling SNP
Secure TSC feature, add Secure TSC to snp features present list.
The CC_ATTR_GUEST_SECURE_TSC can be used by the guest to query whether
the SNP guest has Secure TSC feature active.
Signed-off-by: Nikunj A Dadhania <nikunj@amd.com>
---
arch/x86/boot/compressed/sev.c | 3 ++-
arch/x86/mm/mem_encrypt.c | 10 ++++++++--
2 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/arch/x86/boot/compressed/sev.c b/arch/x86/boot/compressed/sev.c index 80d76aea1f7b..b1a4bab8ecf1 100644 --- a/arch/x86/boot/compressed/sev.c +++ b/arch/x86/boot/compressed/sev.c @@ -375,7 +375,8 @@ static void enforce_vmpl0(void) * by the guest kernel. As and when a new feature is implemented in the * guest kernel, a corresponding bit should be added to the mask. */ -#define SNP_FEATURES_PRESENT MSR_AMD64_SNP_DEBUG_SWAP +#define SNP_FEATURES_PRESENT (MSR_AMD64_SNP_DEBUG_SWAP | \ + MSR_AMD64_SNP_SECURE_TSC) u64 snp_get_unsupported_features(u64 status) { diff --git a/arch/x86/mm/mem_encrypt.c b/arch/x86/mm/mem_encrypt.c index 01abecc9a774..26608b9f2ca7 100644 --- a/arch/x86/mm/mem_encrypt.c +++ b/arch/x86/mm/mem_encrypt.c @@ -69,8 +69,14 @@ static void print_mem_encrypt_feature_info(void) pr_cont(" SEV-ES"); /* Secure Nested Paging */ - if (cc_platform_has(CC_ATTR_GUEST_SEV_SNP)) - pr_cont(" SEV-SNP"); + if (cc_platform_has(CC_ATTR_GUEST_SEV_SNP)) { + pr_cont(" SEV-SNP\n"); + pr_cont("SNP Features active: "); + + /* SNP Secure TSC */ + if (cc_platform_has(CC_ATTR_GUEST_SECURE_TSC)) + pr_cont(" SECURE-TSC"); + } pr_cont("\n"); }