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From: Furong Xu <0x1207@gmail.com>
To: "David S. Miller" <davem@davemloft.net>,
Alexandre Torgue <alexandre.torgue@foss.st.com>,
Jose Abreu <joabreu@synopsys.com>,
Eric Dumazet <edumazet@google.com>,
Jakub Kicinski <kuba@kernel.org>,
Paolo Abeni <pabeni@redhat.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
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Cc: netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
xfr@outlook.com, rock.xu@nio.com, Furong Xu <0x1207@gmail.com>
Subject: [PATCH net] net: stmmac: xgmac: Fix support for multiple Flexible PPS
outputs
Date: Fri, 27 Oct 2023 10:56:03 +0800
Message-Id: <20231027025603.1035668-1-0x1207@gmail.com>
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[net] net: stmmac: xgmac: Fix support for multiple Flexible PPS outputs
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Commit Message
Furong Xu
Oct. 27, 2023, 2:56 a.m. UTC
From XGMAC Core 3.20 and later, each Flexible PPS has individual PPSEN bit
to select Fixed mode or Flexible mode. The PPSEN must be set, or it stays
in Fixed PPS mode by default.
XGMAC Core prior 3.20, corresponding PPSEN bits are read-only reserved,
always set PPSEN do not make things worse ;)
Fixes: 95eaf3cd0a90 ("net: stmmac: dwxgmac: Add Flexible PPS support")
Signed-off-by: Furong Xu <0x1207@gmail.com>
---
drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h | 2 +-
drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
Comments
On Fri, Oct 27, 2023 at 10:56:03AM +0800, Furong Xu wrote: > From XGMAC Core 3.20 and later, each Flexible PPS has individual PPSEN bit > to select Fixed mode or Flexible mode. The PPSEN must be set, or it stays > in Fixed PPS mode by default. > XGMAC Core prior 3.20, corresponding PPSEN bits are read-only reserved, > always set PPSEN do not make things worse ;) > > Fixes: 95eaf3cd0a90 ("net: stmmac: dwxgmac: Add Flexible PPS support") > Signed-off-by: Furong Xu <0x1207@gmail.com> Please don't forget to add the already got tags shall you need more patch revisions. Reviewed-by: Serge Semin <fancer.lancer@gmail.com> -Serge(y) > --- > drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h | 2 +- > drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c | 2 +- > 2 files changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h > index 7a8f47e7b728..a4e8b498dea9 100644 > --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h > +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h > @@ -259,7 +259,7 @@ > ((val) << XGMAC_PPS_MINIDX(x)) > #define XGMAC_PPSCMD_START 0x2 > #define XGMAC_PPSCMD_STOP 0x5 > -#define XGMAC_PPSEN0 BIT(4) > +#define XGMAC_PPSENx(x) BIT(4 + (x) * 8) > #define XGMAC_PPSx_TARGET_TIME_SEC(x) (0x00000d80 + (x) * 0x10) > #define XGMAC_PPSx_TARGET_TIME_NSEC(x) (0x00000d84 + (x) * 0x10) > #define XGMAC_TRGTBUSY0 BIT(31) > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c > index f352be269deb..53bb8f16c481 100644 > --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c > +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c > @@ -1178,7 +1178,7 @@ static int dwxgmac2_flex_pps_config(void __iomem *ioaddr, int index, > > val |= XGMAC_PPSCMDx(index, XGMAC_PPSCMD_START); > val |= XGMAC_TRGTMODSELx(index, XGMAC_PPSCMD_START); > - val |= XGMAC_PPSEN0; > + val |= XGMAC_PPSENx(index); > > writel(cfg->start.tv_sec, ioaddr + XGMAC_PPSx_TARGET_TIME_SEC(index)); > > -- > 2.34.1 > >
On Mon, Oct 30, 2023 at 02:03:50PM +0300, Serge Semin wrote: > On Fri, Oct 27, 2023 at 10:56:03AM +0800, Furong Xu wrote: > > From XGMAC Core 3.20 and later, each Flexible PPS has individual PPSEN bit > > to select Fixed mode or Flexible mode. The PPSEN must be set, or it stays > > in Fixed PPS mode by default. > > XGMAC Core prior 3.20, corresponding PPSEN bits are read-only reserved, > > always set PPSEN do not make things worse ;) > > > > Fixes: 95eaf3cd0a90 ("net: stmmac: dwxgmac: Add Flexible PPS support") > > Signed-off-by: Furong Xu <0x1207@gmail.com> > > Please don't forget to add the already got tags shall you need more > patch revisions. > > Reviewed-by: Serge Semin <fancer.lancer@gmail.com> Ops, this was intended to be sent for v2... I'll send a copy there. -Serge(y) > > -Serge(y) > > > --- > > drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h | 2 +- > > drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c | 2 +- > > 2 files changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h > > index 7a8f47e7b728..a4e8b498dea9 100644 > > --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h > > +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h > > @@ -259,7 +259,7 @@ > > ((val) << XGMAC_PPS_MINIDX(x)) > > #define XGMAC_PPSCMD_START 0x2 > > #define XGMAC_PPSCMD_STOP 0x5 > > -#define XGMAC_PPSEN0 BIT(4) > > +#define XGMAC_PPSENx(x) BIT(4 + (x) * 8) > > #define XGMAC_PPSx_TARGET_TIME_SEC(x) (0x00000d80 + (x) * 0x10) > > #define XGMAC_PPSx_TARGET_TIME_NSEC(x) (0x00000d84 + (x) * 0x10) > > #define XGMAC_TRGTBUSY0 BIT(31) > > diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c > > index f352be269deb..53bb8f16c481 100644 > > --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c > > +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c > > @@ -1178,7 +1178,7 @@ static int dwxgmac2_flex_pps_config(void __iomem *ioaddr, int index, > > > > val |= XGMAC_PPSCMDx(index, XGMAC_PPSCMD_START); > > val |= XGMAC_TRGTMODSELx(index, XGMAC_PPSCMD_START); > > - val |= XGMAC_PPSEN0; > > + val |= XGMAC_PPSENx(index); > > > > writel(cfg->start.tv_sec, ioaddr + XGMAC_PPSx_TARGET_TIME_SEC(index)); > > > > -- > > 2.34.1 > > > >
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h index 7a8f47e7b728..a4e8b498dea9 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2.h @@ -259,7 +259,7 @@ ((val) << XGMAC_PPS_MINIDX(x)) #define XGMAC_PPSCMD_START 0x2 #define XGMAC_PPSCMD_STOP 0x5 -#define XGMAC_PPSEN0 BIT(4) +#define XGMAC_PPSENx(x) BIT(4 + (x) * 8) #define XGMAC_PPSx_TARGET_TIME_SEC(x) (0x00000d80 + (x) * 0x10) #define XGMAC_PPSx_TARGET_TIME_NSEC(x) (0x00000d84 + (x) * 0x10) #define XGMAC_TRGTBUSY0 BIT(31) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c index f352be269deb..53bb8f16c481 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwxgmac2_core.c @@ -1178,7 +1178,7 @@ static int dwxgmac2_flex_pps_config(void __iomem *ioaddr, int index, val |= XGMAC_PPSCMDx(index, XGMAC_PPSCMD_START); val |= XGMAC_TRGTMODSELx(index, XGMAC_PPSCMD_START); - val |= XGMAC_PPSEN0; + val |= XGMAC_PPSENx(index); writel(cfg->start.tv_sec, ioaddr + XGMAC_PPSx_TARGET_TIME_SEC(index));