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Wysocki" , Len Brown , Bjorn Helgaas , Anup Patel , Thomas Gleixner , Greg Kroah-Hartman , Jiri Slaby , Conor Dooley , Andrew Jones , Atish Kumar Patra , Haibo Xu , Sunil V L Subject: [RFC PATCH v2 15/21] irqchip: riscv-aplic: Add ACPI support Date: Thu, 26 Oct 2023 01:53:38 +0530 Message-Id: <20231025202344.581132-16-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231025202344.581132-1-sunilvl@ventanamicro.com> References: <20231025202344.581132-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-Spam-Status: No, score=1.2 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, RCVD_IN_SBL_CSS,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Level: * X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (snail.vger.email [0.0.0.0]); Wed, 25 Oct 2023 13:26:45 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1780760594472413601 X-GMAIL-MSGID: 1780760594472413601 Add ACPI support in APLIC drivers. In ACPI, IO devices use Global System Interrupts (GSI) which is a flat space split across multiple APLICs. So, the driver also need to provide the mapping from GSI to correct APLIC. Signed-off-by: Sunil V L --- arch/riscv/include/asm/irq.h | 6 ++ drivers/irqchip/irq-riscv-aplic-direct.c | 22 +++-- drivers/irqchip/irq-riscv-aplic-main.c | 105 +++++++++++++++++------ drivers/irqchip/irq-riscv-aplic-main.h | 1 + drivers/irqchip/irq-riscv-aplic-msi.c | 10 ++- 5 files changed, 109 insertions(+), 35 deletions(-) diff --git a/arch/riscv/include/asm/irq.h b/arch/riscv/include/asm/irq.h index ef102b6fa86e..00eb8b0333c2 100644 --- a/arch/riscv/include/asm/irq.h +++ b/arch/riscv/include/asm/irq.h @@ -22,6 +22,12 @@ #define APLIC_PLIC_ID(x) ((x) >> 24) #define IDC_CONTEXT_ID(x) ((x) & 0x0000ffff) +#ifdef CONFIG_RISCV_APLIC +struct fwnode_handle *aplic_get_gsi_domain_id(u32 gsi); +#else +static inline struct fwnode_handle *aplic_get_gsi_domain_id(u32 gsi) { return NULL; } +#endif + int __init acpi_get_intc_index_hartid(u32 index, unsigned long *hartid); int acpi_get_ext_intc_parent_hartid(u8 id, u32 idx, unsigned long *hartid); void acpi_get_plic_nr_contexts(u8 id, int *nr_contexts); diff --git a/drivers/irqchip/irq-riscv-aplic-direct.c b/drivers/irqchip/irq-riscv-aplic-direct.c index 9ed2666bfb5e..3902e6d32856 100644 --- a/drivers/irqchip/irq-riscv-aplic-direct.c +++ b/drivers/irqchip/irq-riscv-aplic-direct.c @@ -4,6 +4,7 @@ * Copyright (C) 2022 Ventana Micro Systems Inc. */ +#include #include #include #include @@ -14,6 +15,7 @@ #include #include #include +#include #include "irq-riscv-aplic-main.h" @@ -203,17 +205,20 @@ static int aplic_direct_starting_cpu(unsigned int cpu) static int aplic_direct_parse_parent_hwirq(struct device *dev, u32 index, u32 *parent_hwirq, - unsigned long *parent_hartid) + unsigned long *parent_hartid, + struct aplic_priv *priv) { struct of_phandle_args parent; int rc; - /* - * Currently, only OF fwnode is supported so extend this - * function for ACPI support. - */ - if (!is_of_node(dev->fwnode)) - return -EINVAL; + if (!is_of_node(dev->fwnode)) { + rc = acpi_get_ext_intc_parent_hartid(priv->id, index, parent_hartid); + if (rc) + return rc; + + *parent_hwirq = RV_IRQ_EXT; + return 0; + } rc = of_irq_parse_one(to_of_node(dev->fwnode), index, &parent); if (rc) @@ -251,7 +256,7 @@ int aplic_direct_setup(struct device *dev, void __iomem *regs) /* Setup per-CPU IDC and target CPU mask */ for (i = 0; i < priv->nr_idcs; i++) { - rc = aplic_direct_parse_parent_hwirq(dev, i, &hwirq, &hartid); + rc = aplic_direct_parse_parent_hwirq(dev, i, &hwirq, &hartid, priv); if (rc) { dev_warn(dev, "parent irq for IDC%d not found\n", i); continue; @@ -335,6 +340,7 @@ int aplic_direct_setup(struct device *dev, void __iomem *regs) return -ENOMEM; } + dev_set_drvdata(dev, priv); /* Advertise the interrupt controller */ dev_info(dev, "%d interrupts directly connected to %d CPUs\n", priv->nr_irqs, priv->nr_idcs); diff --git a/drivers/irqchip/irq-riscv-aplic-main.c b/drivers/irqchip/irq-riscv-aplic-main.c index d1b342b66551..f0ba1411c95e 100644 --- a/drivers/irqchip/irq-riscv-aplic-main.c +++ b/drivers/irqchip/irq-riscv-aplic-main.c @@ -4,12 +4,15 @@ * Copyright (C) 2022 Ventana Micro Systems Inc. */ +#include #include #include #include #include #include #include +#include +#include #include "irq-riscv-aplic-main.h" @@ -137,38 +140,44 @@ int aplic_setup_priv(struct aplic_priv *priv, struct device *dev, void __iomem *regs) { struct of_phandle_args parent; + struct acpi_madt_aplic *aplic; int rc; - /* - * Currently, only OF fwnode is supported so extend this - * function for ACPI support. - */ - if (!is_of_node(dev->fwnode)) - return -EINVAL; - /* Save device pointer and register base */ priv->dev = dev; priv->regs = regs; - /* Find out number of interrupt sources */ - rc = of_property_read_u32(to_of_node(dev->fwnode), - "riscv,num-sources", - &priv->nr_irqs); - if (rc) { - dev_err(dev, "failed to get number of interrupt sources\n"); - return rc; - } - - /* - * Find out number of IDCs based on parent interrupts - * - * If "msi-parent" property is present then we ignore the - * APLIC IDCs which forces the APLIC driver to use MSI mode. - */ - if (!of_property_present(to_of_node(dev->fwnode), "msi-parent")) { - while (!of_irq_parse_one(to_of_node(dev->fwnode), - priv->nr_idcs, &parent)) - priv->nr_idcs++; + if (is_of_node(dev->fwnode)) { + /* Find out number of interrupt sources */ + rc = of_property_read_u32(to_of_node(dev->fwnode), + "riscv,num-sources", + &priv->nr_irqs); + if (rc) { + dev_err(dev, "failed to get number of interrupt sources\n"); + return rc; + } + + /* + * Find out number of IDCs based on parent interrupts + * + * If "msi-parent" property is present then we ignore the + * APLIC IDCs which forces the APLIC driver to use MSI mode. + */ + if (!of_property_present(to_of_node(dev->fwnode), "msi-parent")) { + while (!of_irq_parse_one(to_of_node(dev->fwnode), + priv->nr_idcs, &parent)) + priv->nr_idcs++; + } + } else { + aplic = *(struct acpi_madt_aplic **)dev_get_platdata(dev); + if (!aplic) { + dev_err(dev, "APLIC platform data is NULL!\n"); + return -1; + } + priv->gsi_base = aplic->gsi_base; + priv->nr_irqs = aplic->num_sources; + priv->nr_idcs = aplic->num_idcs; + priv->id = aplic->id; } /* Setup initial state APLIC interrupts */ @@ -177,9 +186,36 @@ int aplic_setup_priv(struct aplic_priv *priv, struct device *dev, return 0; } +#ifdef CONFIG_ACPI + +LIST_HEAD(aplic_list); +struct aplic_priv_list { + struct aplic_priv *priv; + struct list_head list; +}; + +struct fwnode_handle *aplic_get_gsi_domain_id(u32 gsi) +{ + struct aplic_priv_list *aplic_element; + struct list_head *i, *tmp; + + /* Find the APLIC that manages this GSI. */ + list_for_each_safe(i, tmp, &aplic_list) { + aplic_element = list_entry(i, struct aplic_priv_list, list); + if (gsi >= aplic_element->priv->gsi_base && + gsi < (aplic_element->priv->gsi_base + aplic_element->priv->nr_irqs)) + return aplic_element->priv->dev->fwnode; + } + + return NULL; +} + +#endif + static int aplic_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; + struct aplic_priv *priv; bool msi_mode = false; struct resource *res; void __iomem *regs; @@ -204,6 +240,9 @@ static int aplic_probe(struct platform_device *pdev) if (is_of_node(dev->fwnode)) msi_mode = of_property_present(to_of_node(dev->fwnode), "msi-parent"); + else + msi_mode = imsic_acpi_get_fwnode(NULL) ? 1 : 0; + if (msi_mode) rc = aplic_msi_setup(dev, regs); else @@ -214,6 +253,20 @@ static int aplic_probe(struct platform_device *pdev) return rc; } +#ifdef CONFIG_ACPI + struct aplic_priv_list *aplic_element; + + priv = dev_get_drvdata(dev); + if (priv) { + aplic_element = devm_kzalloc(dev, sizeof(*aplic_element), GFP_KERNEL); + if (!aplic_element) + return -ENOMEM; + + aplic_element->priv = priv; + list_add_tail(&aplic_element->list, &aplic_list); + } +#endif + return 0; } diff --git a/drivers/irqchip/irq-riscv-aplic-main.h b/drivers/irqchip/irq-riscv-aplic-main.h index 78267ec58098..dc022e89bc97 100644 --- a/drivers/irqchip/irq-riscv-aplic-main.h +++ b/drivers/irqchip/irq-riscv-aplic-main.h @@ -28,6 +28,7 @@ struct aplic_priv { u32 gsi_base; u32 nr_irqs; u32 nr_idcs; + u32 id; void __iomem *regs; struct aplic_msicfg msicfg; }; diff --git a/drivers/irqchip/irq-riscv-aplic-msi.c b/drivers/irqchip/irq-riscv-aplic-msi.c index 086d00e0429e..433ab2f270d9 100644 --- a/drivers/irqchip/irq-riscv-aplic-msi.c +++ b/drivers/irqchip/irq-riscv-aplic-msi.c @@ -178,6 +178,7 @@ static void aplic_msi_write_msg(struct msi_desc *desc, struct msi_msg *msg) int aplic_msi_setup(struct device *dev, void __iomem *regs) { const struct imsic_global_config *imsic_global; + struct irq_domain *msi_domain; struct irq_domain *irqdomain; struct aplic_priv *priv; struct aplic_msicfg *mc; @@ -261,8 +262,14 @@ int aplic_msi_setup(struct device *dev, void __iomem *regs) * IMSIC and the IMSIC MSI domains are created later through * the platform driver probing so we set it explicitly here. */ - if (is_of_node(dev->fwnode)) + if (is_of_node(dev->fwnode)) { of_msi_configure(dev, to_of_node(dev->fwnode)); + } else { + msi_domain = irq_find_matching_fwnode(imsic_acpi_get_fwnode(dev), + DOMAIN_BUS_PLATFORM_MSI); + if (msi_domain) + dev_set_msi_domain(dev, msi_domain); + } } /* Create irq domain instance for the APLIC MSI-mode */ @@ -276,6 +283,7 @@ int aplic_msi_setup(struct device *dev, void __iomem *regs) return -ENOMEM; } + dev_set_drvdata(dev, priv); /* Advertise the interrupt controller */ pa = priv->msicfg.base_ppn << APLIC_xMSICFGADDR_PPN_SHIFT; dev_info(dev, "%d interrupts forwared to MSI base %pa\n",