From patchwork Mon Oct 23 08:29:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Xu Lu X-Patchwork-Id: 156737 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a59:ce89:0:b0:403:3b70:6f57 with SMTP id p9csp1151244vqx; Mon, 23 Oct 2023 01:31:34 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGsTMXV8rAhVyrxPXox/xYNTI8btrI/2MLlygRXffEVaq7t7lYN39VAJn2IKUOqzlbGRgmQ X-Received: by 2002:a17:90b:2b85:b0:27d:1339:9176 with SMTP id rs5-20020a17090b2b8500b0027d13399176mr6179015pjb.25.1698049893837; Mon, 23 Oct 2023 01:31:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1698049893; cv=none; d=google.com; s=arc-20160816; b=Be5dUTPupRwL2jyKZnyT/XYdVhM+bo/udCv2HDFknIiWMTv68SS97QN4ddXRHIb2Yd ctOPSJrS0ohLvoRwEPZjv1OML3c0lxGDBMhJeKrmNJxUkHXLm3es/RTI6kHxVWo0I3oE QKvD6QxiuhokT3pf7csrj/0MYvPHg2duPXlQB3noAJGRr2gnkk1iM8Fs1rbXqNDhZNF0 bV3GDo6hXMfXP2SbWB0FlCr/3kgTpdrz8WSfs3XR2/aqNCDDsuKDdHkGL4MIOTHxGIGZ fiwK47vDAAWI19zpQ3jvbqUTT4P7uQR5jkfX4JfQ45Ja6opunJuytkZ4Cbkg4rAF9UOP fWgw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=AUO1/BVdvM4H5C6LBNItdP0IIJipRGNxmDV7eD7nopg=; fh=O4eOVhHjKTyaSORSQqoF+Vv6GYDagG+8LotEUwhRqvg=; b=cek/fq7M3Pvuoq715KAZpFUmfc31Nlx2q36RbyWIba2mJ7rvpkCVLmtOpsHZfZ6IDE QBi6z7Rc1ItPRFUs8P0Qxb9ZgsFMY5GEvvGwAU/5x7ksj41WkMOrtiJEaBqinRSEv/Td vBPQgGQ9lYdrg48j9Ie/NFRfCKZOF+a086KsCF3tOGz+t/ajYl43hIyDaPhJYrXGx75f 4iff08T6XgaEWVqkRTHw5k/QrzAHDeEjTb2Gre1eXu6kVHkaZqRz52y59juvy2qou2zc CfMaJ+p6OS8ddIYP3RfrhwJUFZzRaFyp8au49bTk+N+FXbGo/zaiRT5vljUPcR7eATQd vr+g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@bytedance.com header.s=google header.b=eIYgUBkX; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:1 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=bytedance.com Received: from morse.vger.email (morse.vger.email. [2620:137:e000::3:1]) by mx.google.com with ESMTPS id nm10-20020a17090b19ca00b0027909685905si6041589pjb.149.2023.10.23.01.31.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 23 Oct 2023 01:31:33 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:1 as permitted sender) client-ip=2620:137:e000::3:1; Authentication-Results: mx.google.com; dkim=pass header.i=@bytedance.com header.s=google header.b=eIYgUBkX; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:1 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=bytedance.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by morse.vger.email (Postfix) with ESMTP id 9D2658079AD9; Mon, 23 Oct 2023 01:30:22 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at morse.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232995AbjJWIaK (ORCPT + 26 others); Mon, 23 Oct 2023 04:30:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35390 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233058AbjJWI35 (ORCPT ); Mon, 23 Oct 2023 04:29:57 -0400 Received: from mail-pf1-x436.google.com (mail-pf1-x436.google.com [IPv6:2607:f8b0:4864:20::436]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B762CD7B for ; Mon, 23 Oct 2023 01:29:55 -0700 (PDT) Received: by mail-pf1-x436.google.com with SMTP id d2e1a72fcca58-6b36e1fcee9so2386712b3a.3 for ; Mon, 23 Oct 2023 01:29:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bytedance.com; s=google; t=1698049795; x=1698654595; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=AUO1/BVdvM4H5C6LBNItdP0IIJipRGNxmDV7eD7nopg=; b=eIYgUBkXxqcUP0Fa4z7vj8CIE5bLNxOer2Zrmzreg36NkvNydrY5vMC1ckvF/Ei60M 0cmk2xdY6RkcYFLQ4QG4z9dO9cNwvm/UKD1Wojx7RSkgNDTJ2phfJ8JoBwfIGd7xL4W7 K1L8g/zVyGF3JT7EbxnhYabXmBv40ESR4rqqcf8ffNLbUTKHrsjW9fo72FGc31s50fTR x07UFMAMOMe9N1VrgS3RcdypsifHCmUvus/kaEGh7q3EFhTY8vj+14yMUTas77+PaqZJ Iij0X4vIlEjVECHAFjLDqVGbdgqWgE26Uvg8ZItAlDWiA6SlYslVhw5qhdDq0Ci/XtYZ PL6w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698049795; x=1698654595; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=AUO1/BVdvM4H5C6LBNItdP0IIJipRGNxmDV7eD7nopg=; b=eOG3RQnWcde32Y9SWVSREX51lxF3U92XdFmLyPu3NqvqbVcjEy1W4VQ2Xoz7FjK62d XZD+Nk4AvvjxI+L9U+WlT5Z2Zt+Q4/IYfNPp4zPfqtREYHsm3odnf+Nl+U1yOegzlNpI Bjy1K8R+xKVA/CgYWC6lAA/dsRqBQvm1xg3xL3uARy4NmVIar0u7TtSihK9INmAIT1jD Xl/iPEf+IDHi7p+3DgjcpeNSoEBXa9Mr2ScgN0TQGunSKKnQP83+j8NZNJsPx+dQ/PZF b2bEFcNR4E5UT+UMv9VnmhoNcuG0P61Dk0X1nRoIJSOfzF9qcBMM1V6g3SnoGyF7fZaG yYkA== X-Gm-Message-State: AOJu0YzlYWwmrGSTxK7F8YkcMVKm+weIiHIV8tTKx7/jShuoZm4ZjqW1 bQ47tdsQ1nF6d3IBRhemtPdO5g== X-Received: by 2002:a05:6a20:2615:b0:151:7d4c:899c with SMTP id i21-20020a056a20261500b001517d4c899cmr4935811pze.25.1698049795184; Mon, 23 Oct 2023 01:29:55 -0700 (PDT) Received: from J9GPGXL7NT.bytedance.net ([203.208.167.147]) by smtp.gmail.com with ESMTPSA id d15-20020a170903230f00b001b8b07bc600sm5415805plh.186.2023.10.23.01.29.49 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 23 Oct 2023 01:29:54 -0700 (PDT) From: Xu Lu To: paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, tglx@linutronix.de, maz@kernel.org, anup@brainfault.org, atishp@atishpatra.org Cc: dengliang.1214@bytedance.com, liyu.yukiteru@bytedance.com, sunjiadong.lff@bytedance.com, xieyongji@bytedance.com, lihangjing@bytedance.com, chaiwen.cc@bytedance.com, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Xu Lu Subject: [RFC 06/12] riscv: Allow requesting irq as pseudo NMI Date: Mon, 23 Oct 2023 16:29:05 +0800 Message-Id: <20231023082911.23242-7-luxu.kernel@bytedance.com> X-Mailer: git-send-email 2.39.3 (Apple Git-145) In-Reply-To: <20231023082911.23242-1-luxu.kernel@bytedance.com> References: <20231023082911.23242-1-luxu.kernel@bytedance.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on morse.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (morse.vger.email [0.0.0.0]); Mon, 23 Oct 2023 01:30:22 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1780534365455877037 X-GMAIL-MSGID: 1780534365455877037 This commit implements pseudo NMI callbacks for riscv_intc_irq chip. We use an immediate macro to denote NMIs of each cpu. Each bit of it represents an irq. Bit 1 means corresponding irq is registered as NMI while bit 0 means not. Signed-off-by: Xu Lu Signed-off-by: Hangjing Li Reviewed-by: Liang Deng Reviewed-by: Yu Li --- arch/riscv/include/asm/irqflags.h | 17 ++++++++++++++ drivers/irqchip/irq-riscv-intc.c | 38 +++++++++++++++++++++++++++++++ 2 files changed, 55 insertions(+) diff --git a/arch/riscv/include/asm/irqflags.h b/arch/riscv/include/asm/irqflags.h index 60c19f8b57f0..9700a17a003a 100644 --- a/arch/riscv/include/asm/irqflags.h +++ b/arch/riscv/include/asm/irqflags.h @@ -12,6 +12,23 @@ #ifdef CONFIG_RISCV_PSEUDO_NMI +#define __ALLOWED_NMI_MASK 0 +#define ALLOWED_NMI_MASK (__ALLOWED_NMI_MASK & irqs_enabled_ie) + +static inline bool nmi_allowed(int irq) +{ + return (BIT(irq) & ALLOWED_NMI_MASK); +} + +static inline bool is_nmi(int irq) +{ + return (BIT(irq) & ALLOWED_NMI_MASK); +} + +static inline void set_nmi(int irq) {} + +static inline void unset_nmi(int irq) {} + static inline void local_irq_switch_on(void) { csr_set(CSR_STATUS, SR_IE); diff --git a/drivers/irqchip/irq-riscv-intc.c b/drivers/irqchip/irq-riscv-intc.c index 7fad1ba37e5c..83a0a744fce6 100644 --- a/drivers/irqchip/irq-riscv-intc.c +++ b/drivers/irqchip/irq-riscv-intc.c @@ -67,11 +67,49 @@ static void riscv_intc_irq_eoi(struct irq_data *d) */ } +#ifdef CONFIG_RISCV_PSEUDO_NMI + +static int riscv_intc_irq_nmi_setup(struct irq_data *d) +{ + unsigned int hwirq = d->hwirq; + struct irq_desc *desc = irq_to_desc(d->irq); + + if (WARN_ON((hwirq >= BITS_PER_LONG) || !nmi_allowed(hwirq))) + return -EINVAL; + + desc->handle_irq = handle_percpu_devid_fasteoi_nmi; + set_nmi(hwirq); + + return 0; +} + +static void riscv_intc_irq_nmi_teardown(struct irq_data *d) +{ + unsigned int hwirq = d->hwirq; + struct irq_desc *desc = irq_to_desc(d->irq); + + if (WARN_ON(hwirq >= BITS_PER_LONG)) + return; + + if (WARN_ON(!is_nmi(hwirq))) + return; + + desc->handle_irq = handle_percpu_devid_irq; + unset_nmi(hwirq); +} + +#endif /* CONFIG_RISCV_PSEUDO_NMI */ + static struct irq_chip riscv_intc_chip = { .name = "RISC-V INTC", .irq_mask = riscv_intc_irq_mask, .irq_unmask = riscv_intc_irq_unmask, .irq_eoi = riscv_intc_irq_eoi, +#ifdef CONFIG_RISCV_PSEUDO_NMI + .irq_nmi_setup = riscv_intc_irq_nmi_setup, + .irq_nmi_teardown = riscv_intc_irq_nmi_teardown, + .flags = IRQCHIP_SUPPORTS_NMI, +#endif }; static int riscv_intc_domain_map(struct irq_domain *d, unsigned int irq,