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Mon, 23 Oct 2023 01:30:11 -0700 (PDT) From: Xu Lu To: paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, tglx@linutronix.de, maz@kernel.org, anup@brainfault.org, atishp@atishpatra.org Cc: dengliang.1214@bytedance.com, liyu.yukiteru@bytedance.com, sunjiadong.lff@bytedance.com, xieyongji@bytedance.com, lihangjing@bytedance.com, chaiwen.cc@bytedance.com, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Xu Lu Subject: [RFC 09/12] riscv: Enable NMIs during exceptions Date: Mon, 23 Oct 2023 16:29:08 +0800 Message-Id: <20231023082911.23242-10-luxu.kernel@bytedance.com> X-Mailer: git-send-email 2.39.3 (Apple Git-145) In-Reply-To: <20231023082911.23242-1-luxu.kernel@bytedance.com> References: <20231023082911.23242-1-luxu.kernel@bytedance.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on howler.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (howler.vger.email [0.0.0.0]); Mon, 23 Oct 2023 01:31:14 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1780534381599763361 X-GMAIL-MSGID: 1780534381599763361 We have switched the way of disabling irqs to CSR_IE masking. But hardware still automatically clearing SIE field of CSR_STATUS whenever thread traps into kernel, which disabling all irqs including NMIs. This commit re-enables NMIs and normal irqs during exceptions by setting the SIE field in CSR_STATUS and restoring NMI and irq bits in CSR_IE. Signed-off-by: Xu Lu --- arch/riscv/include/asm/irqflags.h | 13 +++++++++++++ arch/riscv/include/asm/switch_to.h | 7 +++++++ arch/riscv/kernel/traps.c | 10 ++++++++++ 3 files changed, 30 insertions(+) diff --git a/arch/riscv/include/asm/irqflags.h b/arch/riscv/include/asm/irqflags.h index 42f7803582df..6a709e9c69ca 100644 --- a/arch/riscv/include/asm/irqflags.h +++ b/arch/riscv/include/asm/irqflags.h @@ -29,6 +29,16 @@ static inline void set_nmi(int irq) {} static inline void unset_nmi(int irq) {} +static inline void enable_nmis(void) +{ + csr_set(CSR_IE, ALLOWED_NMI_MASK); +} + +static inline void disable_nmis(void) +{ + csr_clear(CSR_IE, ALLOWED_NMI_MASK); +} + static inline void local_irq_switch_on(void) { csr_set(CSR_STATUS, SR_IE); @@ -128,6 +138,9 @@ static inline void arch_local_irq_restore(unsigned long flags) csr_set(CSR_STATUS, flags & SR_IE); } +static inline void enable_nmis(void) {} +static inline void disable_nmis(void) {} + #endif /* !CONFIG_RISCV_PSEUDO_NMI */ #endif /* _ASM_RISCV_IRQFLAGS_H */ diff --git a/arch/riscv/include/asm/switch_to.h b/arch/riscv/include/asm/switch_to.h index a727be723c56..116cffeaa6bf 100644 --- a/arch/riscv/include/asm/switch_to.h +++ b/arch/riscv/include/asm/switch_to.h @@ -84,4 +84,11 @@ do { \ ((last) = __switch_to(__prev, __next)); \ } while (0) +#ifdef CONFIG_RISCV_PSEUDO_NMI + +#define prepare_arch_switch(next) disable_nmis() +#define finish_arch_post_lock_switch() enable_nmis() + +#endif /* CONFIG_RISCV_PSEUDO_NMI */ + #endif /* _ASM_RISCV_SWITCH_TO_H */ diff --git a/arch/riscv/kernel/traps.c b/arch/riscv/kernel/traps.c index fae8f610d867..63d3c1417563 100644 --- a/arch/riscv/kernel/traps.c +++ b/arch/riscv/kernel/traps.c @@ -135,7 +135,9 @@ asmlinkage __visible __trap_section void name(struct pt_regs *regs) \ { \ if (user_mode(regs)) { \ irqentry_enter_from_user_mode(regs); \ + enable_nmis(); \ do_trap_error(regs, signo, code, regs->epc, "Oops - " str); \ + disable_nmis(); \ irqentry_exit_to_user_mode(regs); \ } else { \ irqentry_state_t state = irqentry_nmi_enter(regs); \ @@ -292,8 +294,12 @@ asmlinkage __visible __trap_section void do_trap_break(struct pt_regs *regs) if (user_mode(regs)) { irqentry_enter_from_user_mode(regs); + enable_nmis(); + handle_break(regs); + disable_nmis(); + irqentry_exit_to_user_mode(regs); } else { irqentry_state_t state = irqentry_nmi_enter(regs); @@ -338,10 +344,14 @@ asmlinkage __visible noinstr void do_page_fault(struct pt_regs *regs) { irqentry_state_t state = irqentry_enter(regs); + enable_nmis(); + handle_page_fault(regs); local_irq_disable(); + disable_nmis(); + irqentry_exit(regs, state); } #endif