diff mbox series

[1/2] x86/apic: Allow reprogramming IOAPIC pins the first time for non-legacy IRQs

Message ID 20231020033806.88063-1-mario.limonciello@amd.com
State New
Headers
Series [1/2] x86/apic: Allow reprogramming IOAPIC pins the first time for non-legacy IRQs |

Commit Message

Mario Limonciello Oct. 20, 2023, 3:38 a.m. UTC 
  If the system is set up without legacy IRQs configured
acpi_register_gsi_ioapic() still needs to be able to program the IOAPIC
to match the values from _CRS which might not match what is already
programmed to the IOAPIC.

Reported-by: dlazar@gmail.com
Closes: https://bugzilla.kernel.org/show_bug.cgi?id=218003
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
---
 arch/x86/kernel/apic/io_apic.c | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

Comments

Mario Limonciello Oct. 23, 2023, 1:26 p.m. UTC | #1 
On 10/19/2023 22:38, Mario Limonciello wrote:
> If the system is set up without legacy IRQs configured
> acpi_register_gsi_ioapic() still needs to be able to program the IOAPIC
> to match the values from _CRS which might not match what is already
> programmed to the IOAPIC.
> 
> Reported-by: dlazar@gmail.com
> Closes: https://bugzilla.kernel.org/show_bug.cgi?id=218003
> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
> ---
>   arch/x86/kernel/apic/io_apic.c | 8 ++------
>   1 file changed, 2 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
> index 00da6cf6b07d..27dd279dcc7b 100644
> --- a/arch/x86/kernel/apic/io_apic.c
> +++ b/arch/x86/kernel/apic/io_apic.c
> @@ -928,12 +928,8 @@ static bool mp_check_pin_attr(int irq, struct irq_alloc_info *info)
>   {
>   	struct mp_chip_data *data = irq_get_chip_data(irq);
>   
> -	/*
> -	 * setup_IO_APIC_irqs() programs all legacy IRQs with default trigger
> -	 * and polarity attributes. So allow the first user to reprogram the
> -	 * pin with real trigger and polarity attributes.
> -	 */
> -	if (irq < nr_legacy_irqs() && data->count == 1) {
> +	/* allow the first user to reprogram the pin with real trigger and polarity */
> +	if (data->count == 1) {
>   		if (info->ioapic.is_level != data->is_level)
>   			mp_register_handler(irq, info->ioapic.is_level);
>   		data->entry.is_level = data->is_level = info->ioapic.is_level;

David mentioned it on the Bugzilla, but for the benefit of those not 
looking there, this series is confirmed to fix the problem.
diff mbox series

Patch

diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 00da6cf6b07d..27dd279dcc7b 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -928,12 +928,8 @@  static bool mp_check_pin_attr(int irq, struct irq_alloc_info *info)
 {
 	struct mp_chip_data *data = irq_get_chip_data(irq);
 
-	/*
-	 * setup_IO_APIC_irqs() programs all legacy IRQs with default trigger
-	 * and polarity attributes. So allow the first user to reprogram the
-	 * pin with real trigger and polarity attributes.
-	 */
-	if (irq < nr_legacy_irqs() && data->count == 1) {
+	/* allow the first user to reprogram the pin with real trigger and polarity */
+	if (data->count == 1) {
 		if (info->ioapic.is_level != data->is_level)
 			mp_register_handler(irq, info->ioapic.is_level);
 		data->entry.is_level = data->is_level = info->ioapic.is_level;