diff mbox series

[v3,4/5] x86/paravirt: switch mixed paravirt/alternative calls to alternative_2

Message ID 20231019091520.14540-5-jgross@suse.com
State New
Headers
Series x86/paravirt: Get rid of paravirt patching |

Commit Message

Juergen Gross Oct. 19, 2023, 9:15 a.m. UTC 
  Instead of stacking alternative and paravirt patching, use the new
ALT_FLAG_CALL flag to switch those mixed calls to pure alternative
handling.

This eliminates the need to be careful regarding the sequence of
alternative and paravirt patching.

For call depth tracking callthunks_setup() needs to be adapted to patch
calls at alternative patching sites instead of paravirt calls.

Signed-off-by: Juergen Gross <jgross@suse.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
---
 arch/x86/include/asm/alternative.h    |  5 +++--
 arch/x86/include/asm/paravirt.h       |  9 ++++++---
 arch/x86/include/asm/paravirt_types.h | 26 +++++++++-----------------
 arch/x86/kernel/callthunks.c          | 17 ++++++++---------
 arch/x86/kernel/module.c              | 20 +++++---------------
 5 files changed, 31 insertions(+), 46 deletions(-)

Comments

kernel test robot Oct. 19, 2023, 11:55 a.m. UTC | #1 
Hi Juergen,

kernel test robot noticed the following build warnings:

[auto build test WARNING on kvm/queue]
[cannot apply to tip/x86/core]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Juergen-Gross/x86-paravirt-move-some-functions-and-defines-to-alternative/20231019-171709
base:   https://git.kernel.org/pub/scm/virt/kvm/kvm.git queue
patch link:    https://lore.kernel.org/r/20231019091520.14540-5-jgross%40suse.com
patch subject: [PATCH v3 4/5] x86/paravirt: switch mixed paravirt/alternative calls to alternative_2
reproduce: (https://download.01.org/0day-ci/archive/20231019/202310191920.R0c39S5h-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202310191920.R0c39S5h-lkp@intel.com/

# many are suggestions rather than must-fix

ERROR:BRACKET_SPACE: space prohibited before open square bracket '['
#92: FILE: arch/x86/include/asm/paravirt_types.h:281:
+#define paravirt_ptr(op)	[paravirt_opptr] "m" (pv_ops.op)
kernel test robot Oct. 26, 2023, 2:44 a.m. UTC | #2 
Hello,

kernel test robot noticed "BUG:unable_to_handle_page_fault_for_address" on:

commit: b0b8b06548f7984351b503ec5f5c13fa80bae6a2 ("[PATCH v3 4/5] x86/paravirt: switch mixed paravirt/alternative calls to alternative_2")
url: https://github.com/intel-lab-lkp/linux/commits/Juergen-Gross/x86-paravirt-move-some-functions-and-defines-to-alternative/20231019-171709
base: https://git.kernel.org/cgit/virt/kvm/kvm.git queue
patch link: https://lore.kernel.org/all/20231019091520.14540-5-jgross@suse.com/
patch subject: [PATCH v3 4/5] x86/paravirt: switch mixed paravirt/alternative calls to alternative_2

in testcase: boot

compiler: gcc-12
test machine: qemu-system-x86_64 -enable-kvm -cpu SandyBridge -smp 2 -m 16G

(please refer to attached dmesg/kmsg for entire log/backtrace)


+---------------------------------------------+------------+------------+
|                                             | efa1a70f0b | b0b8b06548 |
+---------------------------------------------+------------+------------+
| BUG:unable_to_handle_page_fault_for_address | 0          | 14         |
| Oops:#[##]                                  | 0          | 14         |
| EIP:apply_alternatives                      | 0          | 14         |
| Kernel_panic-not_syncing:Fatal_exception    | 0          | 14         |
+---------------------------------------------+------------+------------+


If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <oliver.sang@intel.com>
| Closes: https://lore.kernel.org/oe-lkp/202310261032.76a10bc0-oliver.sang@intel.com


[    1.382500][    T0] BUG: unable to handle page fault for address: 84864e91
[    1.383633][    T0] #PF: supervisor read access in kernel mode
[    1.384579][    T0] #PF: error_code(0x0000) - not-present page
[    1.384579][    T0] *pde = 00000000
[    1.384579][    T0] Oops: 0000 [#1] PREEMPT SMP
[    1.384579][    T0] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 6.6.0-rc5-00101-gb0b8b06548f7 #1 7cb7f016c05986cc453a3ae4b37cd3712c62c0c0
[    1.384579][    T0] Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 1.16.2-debian-1.16.2-1 04/01/2014
[ 1.384579][ T0] EIP: apply_alternatives (arch/x86/kernel/alternative.c:419 arch/x86/kernel/alternative.c:489) 
[ 1.384579][ T0] Code: 3c 06 0f 85 4e 02 00 00 8b 85 ec fe ff ff 80 38 ff 0f 85 3f 02 00 00 80 78 01 15 0f 85 35 02 00 00 8b 8d ec fe ff ff 8b 41 02 <8b> 44 01 06 85 c0 74 17 89 c2 81 ea 60 18 7c c2 01 95 f3 fe ff ff
All code
========
   0:	3c 06                	cmp    $0x6,%al
   2:	0f 85 4e 02 00 00    	jne    0x256
   8:	8b 85 ec fe ff ff    	mov    -0x114(%rbp),%eax
   e:	80 38 ff             	cmpb   $0xff,(%rax)
  11:	0f 85 3f 02 00 00    	jne    0x256
  17:	80 78 01 15          	cmpb   $0x15,0x1(%rax)
  1b:	0f 85 35 02 00 00    	jne    0x256
  21:	8b 8d ec fe ff ff    	mov    -0x114(%rbp),%ecx
  27:	8b 41 02             	mov    0x2(%rcx),%eax
  2a:*	8b 44 01 06          	mov    0x6(%rcx,%rax,1),%eax		<-- trapping instruction
  2e:	85 c0                	test   %eax,%eax
  30:	74 17                	je     0x49
  32:	89 c2                	mov    %eax,%edx
  34:	81 ea 60 18 7c c2    	sub    $0xc27c1860,%edx
  3a:	01 95 f3 fe ff ff    	add    %edx,-0x10d(%rbp)

Code starting with the faulting instruction
===========================================
   0:	8b 44 01 06          	mov    0x6(%rcx,%rax,1),%eax
   4:	85 c0                	test   %eax,%eax
   6:	74 17                	je     0x1f
   8:	89 c2                	mov    %eax,%edx
   a:	81 ea 60 18 7c c2    	sub    $0xc27c1860,%edx
  10:	01 95 f3 fe ff ff    	add    %edx,-0x10d(%rbp)
[    1.384579][    T0] EAX: c37e7374 EBX: c37b7e3a ECX: c107db17 EDX: 00000005
[    1.384579][    T0] ESI: c3ffc70a EDI: 00000000 EBP: c37b7f48 ESP: c37b7e00
[    1.384579][    T0] DS: 007b ES: 007b FS: 00d8 GS: 0000 SS: 0068 EFLAGS: 00210246
[    1.384579][    T0] CR0: 80050033 CR2: 84864e91 CR3: 04037000 CR4: 000406d0
[    1.384579][    T0] DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
[    1.384579][    T0] DR6: fffe0ff0 DR7: 00000400
[    1.384579][    T0] Call Trace:
[ 1.384579][ T0] ? show_regs (arch/x86/kernel/dumpstack.c:479) 
[ 1.384579][ T0] ? __die (arch/x86/kernel/dumpstack.c:421 arch/x86/kernel/dumpstack.c:434) 
[ 1.384579][ T0] ? oops_enter (kernel/panic.c:627) 
[ 1.384579][ T0] ? page_fault_oops (arch/x86/mm/fault.c:707) 
[ 1.384579][ T0] ? kernelmode_fixup_or_oops+0x9c/0xf4 
[ 1.384579][ T0] ? __bad_area_nosemaphore+0x13f/0x260 
[ 1.384579][ T0] ? insn_get_opcode (arch/x86/lib/insn.c:299) 
[ 1.384579][ T0] ? insn_get_modrm (arch/x86/lib/insn.c:344) 
[ 1.384579][ T0] ? insn_get_sib (arch/x86/lib/insn.c:422) 
[ 1.384579][ T0] ? bad_area_nosemaphore (arch/x86/mm/fault.c:867) 
[ 1.384579][ T0] ? do_user_addr_fault (arch/x86/mm/fault.c:1476) 
[ 1.384579][ T0] ? optimize_nops (arch/x86/kernel/alternative.c:246) 
[ 1.384579][ T0] ? exc_page_fault (arch/x86/include/asm/irqflags.h:26 arch/x86/include/asm/irqflags.h:67 arch/x86/include/asm/irqflags.h:127 arch/x86/mm/fault.c:1513 arch/x86/mm/fault.c:1561) 
[ 1.384579][ T0] ? pvclock_clocksource_read_nowd (arch/x86/mm/fault.c:1518) 
[ 1.384579][ T0] ? handle_exception (arch/x86/entry/entry_32.S:1049) 
[ 1.384579][ T0] ? ___pte_free_tlb (arch/x86/include/asm/paravirt.h:92 arch/x86/mm/pgtable.c:57) 
[ 1.384579][ T0] ? pvclock_clocksource_read_nowd (arch/x86/mm/fault.c:1518) 
[ 1.384579][ T0] ? apply_alternatives (arch/x86/kernel/alternative.c:419 arch/x86/kernel/alternative.c:489) 
[ 1.384579][ T0] ? pvclock_clocksource_read_nowd (arch/x86/mm/fault.c:1518) 
[ 1.384579][ T0] ? apply_alternatives (arch/x86/kernel/alternative.c:419 arch/x86/kernel/alternative.c:489) 
[ 1.384579][ T0] ? lock_acquire (kernel/locking/lockdep.c:5670 kernel/locking/lockdep.c:5744) 
[ 1.384579][ T0] ? ___pte_free_tlb (arch/x86/include/asm/paravirt.h:92 arch/x86/mm/pgtable.c:57) 
[ 1.384579][ T0] alternative_instructions (arch/x86/kernel/alternative.c:1677) 
[ 1.384579][ T0] ? fpu__init_cpu (arch/x86/kernel/fpu/init.c:54) 
[ 1.384579][ T0] arch_cpu_finalize_init (arch/x86/kernel/cpu/common.c:2407) 
[ 1.384579][ T0] start_kernel (init/main.c:1035) 
[ 1.384579][ T0] ? set_init_arg (init/main.c:530) 
[ 1.384579][ T0] i386_start_kernel (arch/x86/kernel/head32.c:74) 
[ 1.384579][ T0] startup_32_smp (arch/x86/kernel/head_32.S:305) 
[    1.384579][    T0] Modules linked in:
[    1.384579][    T0] CR2: 0000000084864e91
[    1.384579][    T0] ---[ end trace 0000000000000000 ]---
[ 1.384579][ T0] EIP: apply_alternatives (arch/x86/kernel/alternative.c:419 arch/x86/kernel/alternative.c:489) 
[ 1.384579][ T0] Code: 3c 06 0f 85 4e 02 00 00 8b 85 ec fe ff ff 80 38 ff 0f 85 3f 02 00 00 80 78 01 15 0f 85 35 02 00 00 8b 8d ec fe ff ff 8b 41 02 <8b> 44 01 06 85 c0 74 17 89 c2 81 ea 60 18 7c c2 01 95 f3 fe ff ff
All code
========
   0:	3c 06                	cmp    $0x6,%al
   2:	0f 85 4e 02 00 00    	jne    0x256
   8:	8b 85 ec fe ff ff    	mov    -0x114(%rbp),%eax
   e:	80 38 ff             	cmpb   $0xff,(%rax)
  11:	0f 85 3f 02 00 00    	jne    0x256
  17:	80 78 01 15          	cmpb   $0x15,0x1(%rax)
  1b:	0f 85 35 02 00 00    	jne    0x256
  21:	8b 8d ec fe ff ff    	mov    -0x114(%rbp),%ecx
  27:	8b 41 02             	mov    0x2(%rcx),%eax
  2a:*	8b 44 01 06          	mov    0x6(%rcx,%rax,1),%eax		<-- trapping instruction
  2e:	85 c0                	test   %eax,%eax
  30:	74 17                	je     0x49
  32:	89 c2                	mov    %eax,%edx
  34:	81 ea 60 18 7c c2    	sub    $0xc27c1860,%edx
  3a:	01 95 f3 fe ff ff    	add    %edx,-0x10d(%rbp)

Code starting with the faulting instruction
===========================================
   0:	8b 44 01 06          	mov    0x6(%rcx,%rax,1),%eax
   4:	85 c0                	test   %eax,%eax
   6:	74 17                	je     0x1f
   8:	89 c2                	mov    %eax,%edx
   a:	81 ea 60 18 7c c2    	sub    $0xc27c1860,%edx
  10:	01 95 f3 fe ff ff    	add    %edx,-0x10d(%rbp)


The kernel config and materials to reproduce are available at:
https://download.01.org/0day-ci/archive/20231026/202310261032.76a10bc0-oliver.sang@intel.com
Juergen Gross Oct. 26, 2023, 6:33 a.m. UTC | #3 
On 26.10.23 04:44, kernel test robot wrote:
> 
> 
> Hello,
> 
> kernel test robot noticed "BUG:unable_to_handle_page_fault_for_address" on:
> 
> commit: b0b8b06548f7984351b503ec5f5c13fa80bae6a2 ("[PATCH v3 4/5] x86/paravirt: switch mixed paravirt/alternative calls to alternative_2")
> url: https://github.com/intel-lab-lkp/linux/commits/Juergen-Gross/x86-paravirt-move-some-functions-and-defines-to-alternative/20231019-171709
> base: https://git.kernel.org/cgit/virt/kvm/kvm.git queue
> patch link: https://lore.kernel.org/all/20231019091520.14540-5-jgross@suse.com/
> patch subject: [PATCH v3 4/5] x86/paravirt: switch mixed paravirt/alternative calls to alternative_2
> 
> in testcase: boot
> 
> compiler: gcc-12
> test machine: qemu-system-x86_64 -enable-kvm -cpu SandyBridge -smp 2 -m 16G
> 
> (please refer to attached dmesg/kmsg for entire log/backtrace)
> 
> 
> +---------------------------------------------+------------+------------+
> |                                             | efa1a70f0b | b0b8b06548 |
> +---------------------------------------------+------------+------------+
> | BUG:unable_to_handle_page_fault_for_address | 0          | 14         |
> | Oops:#[##]                                  | 0          | 14         |
> | EIP:apply_alternatives                      | 0          | 14         |
> | Kernel_panic-not_syncing:Fatal_exception    | 0          | 14         |
> +---------------------------------------------+------------+------------+
> 
> 
> If you fix the issue in a separate patch/commit (i.e. not just a new version of
> the same patch/commit), kindly add following tags
> | Reported-by: kernel test robot <oliver.sang@intel.com>
> | Closes: https://lore.kernel.org/oe-lkp/202310261032.76a10bc0-oliver.sang@intel.com
> 
> 
> [    1.382500][    T0] BUG: unable to handle page fault for address: 84864e91
> [    1.383633][    T0] #PF: supervisor read access in kernel mode
> [    1.384579][    T0] #PF: error_code(0x0000) - not-present page
> [    1.384579][    T0] *pde = 00000000
> [    1.384579][    T0] Oops: 0000 [#1] PREEMPT SMP
> [    1.384579][    T0] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 6.6.0-rc5-00101-gb0b8b06548f7 #1 7cb7f016c05986cc453a3ae4b37cd3712c62c0c0
> [    1.384579][    T0] Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 1.16.2-debian-1.16.2-1 04/01/2014
> [ 1.384579][ T0] EIP: apply_alternatives (arch/x86/kernel/alternative.c:419 arch/x86/kernel/alternative.c:489)
> [ 1.384579][ T0] Code: 3c 06 0f 85 4e 02 00 00 8b 85 ec fe ff ff 80 38 ff 0f 85 3f 02 00 00 80 78 01 15 0f 85 35 02 00 00 8b 8d ec fe ff ff 8b 41 02 <8b> 44 01 06 85 c0 74 17 89 c2 81 ea 60 18 7c c2 01 95 f3 fe ff ff
> All code
> ========
>     0:	3c 06                	cmp    $0x6,%al
>     2:	0f 85 4e 02 00 00    	jne    0x256
>     8:	8b 85 ec fe ff ff    	mov    -0x114(%rbp),%eax
>     e:	80 38 ff             	cmpb   $0xff,(%rax)
>    11:	0f 85 3f 02 00 00    	jne    0x256
>    17:	80 78 01 15          	cmpb   $0x15,0x1(%rax)
>    1b:	0f 85 35 02 00 00    	jne    0x256
>    21:	8b 8d ec fe ff ff    	mov    -0x114(%rbp),%ecx
>    27:	8b 41 02             	mov    0x2(%rcx),%eax
>    2a:*	8b 44 01 06          	mov    0x6(%rcx,%rax,1),%eax		<-- trapping instruction
>    2e:	85 c0                	test   %eax,%eax
>    30:	74 17                	je     0x49
>    32:	89 c2                	mov    %eax,%edx
>    34:	81 ea 60 18 7c c2    	sub    $0xc27c1860,%edx
>    3a:	01 95 f3 fe ff ff    	add    %edx,-0x10d(%rbp)
> 
> Code starting with the faulting instruction
> ===========================================
>     0:	8b 44 01 06          	mov    0x6(%rcx,%rax,1),%eax
>     4:	85 c0                	test   %eax,%eax
>     6:	74 17                	je     0x1f
>     8:	89 c2                	mov    %eax,%edx
>     a:	81 ea 60 18 7c c2    	sub    $0xc27c1860,%edx
>    10:	01 95 f3 fe ff ff    	add    %edx,-0x10d(%rbp)
> [    1.384579][    T0] EAX: c37e7374 EBX: c37b7e3a ECX: c107db17 EDX: 00000005
> [    1.384579][    T0] ESI: c3ffc70a EDI: 00000000 EBP: c37b7f48 ESP: c37b7e00
> [    1.384579][    T0] DS: 007b ES: 007b FS: 00d8 GS: 0000 SS: 0068 EFLAGS: 00210246
> [    1.384579][    T0] CR0: 80050033 CR2: 84864e91 CR3: 04037000 CR4: 000406d0
> [    1.384579][    T0] DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
> [    1.384579][    T0] DR6: fffe0ff0 DR7: 00000400
> [    1.384579][    T0] Call Trace:
> [ 1.384579][ T0] ? show_regs (arch/x86/kernel/dumpstack.c:479)
> [ 1.384579][ T0] ? __die (arch/x86/kernel/dumpstack.c:421 arch/x86/kernel/dumpstack.c:434)
> [ 1.384579][ T0] ? oops_enter (kernel/panic.c:627)
> [ 1.384579][ T0] ? page_fault_oops (arch/x86/mm/fault.c:707)
> [ 1.384579][ T0] ? kernelmode_fixup_or_oops+0x9c/0xf4
> [ 1.384579][ T0] ? __bad_area_nosemaphore+0x13f/0x260
> [ 1.384579][ T0] ? insn_get_opcode (arch/x86/lib/insn.c:299)
> [ 1.384579][ T0] ? insn_get_modrm (arch/x86/lib/insn.c:344)
> [ 1.384579][ T0] ? insn_get_sib (arch/x86/lib/insn.c:422)
> [ 1.384579][ T0] ? bad_area_nosemaphore (arch/x86/mm/fault.c:867)
> [ 1.384579][ T0] ? do_user_addr_fault (arch/x86/mm/fault.c:1476)
> [ 1.384579][ T0] ? optimize_nops (arch/x86/kernel/alternative.c:246)
> [ 1.384579][ T0] ? exc_page_fault (arch/x86/include/asm/irqflags.h:26 arch/x86/include/asm/irqflags.h:67 arch/x86/include/asm/irqflags.h:127 arch/x86/mm/fault.c:1513 arch/x86/mm/fault.c:1561)
> [ 1.384579][ T0] ? pvclock_clocksource_read_nowd (arch/x86/mm/fault.c:1518)
> [ 1.384579][ T0] ? handle_exception (arch/x86/entry/entry_32.S:1049)
> [ 1.384579][ T0] ? ___pte_free_tlb (arch/x86/include/asm/paravirt.h:92 arch/x86/mm/pgtable.c:57)
> [ 1.384579][ T0] ? pvclock_clocksource_read_nowd (arch/x86/mm/fault.c:1518)
> [ 1.384579][ T0] ? apply_alternatives (arch/x86/kernel/alternative.c:419 arch/x86/kernel/alternative.c:489)
> [ 1.384579][ T0] ? pvclock_clocksource_read_nowd (arch/x86/mm/fault.c:1518)
> [ 1.384579][ T0] ? apply_alternatives (arch/x86/kernel/alternative.c:419 arch/x86/kernel/alternative.c:489)
> [ 1.384579][ T0] ? lock_acquire (kernel/locking/lockdep.c:5670 kernel/locking/lockdep.c:5744)
> [ 1.384579][ T0] ? ___pte_free_tlb (arch/x86/include/asm/paravirt.h:92 arch/x86/mm/pgtable.c:57)
> [ 1.384579][ T0] alternative_instructions (arch/x86/kernel/alternative.c:1677)
> [ 1.384579][ T0] ? fpu__init_cpu (arch/x86/kernel/fpu/init.c:54)
> [ 1.384579][ T0] arch_cpu_finalize_init (arch/x86/kernel/cpu/common.c:2407)
> [ 1.384579][ T0] start_kernel (init/main.c:1035)
> [ 1.384579][ T0] ? set_init_arg (init/main.c:530)
> [ 1.384579][ T0] i386_start_kernel (arch/x86/kernel/head32.c:74)
> [ 1.384579][ T0] startup_32_smp (arch/x86/kernel/head_32.S:305)
> [    1.384579][    T0] Modules linked in:
> [    1.384579][    T0] CR2: 0000000084864e91
> [    1.384579][    T0] ---[ end trace 0000000000000000 ]---
> [ 1.384579][ T0] EIP: apply_alternatives (arch/x86/kernel/alternative.c:419 arch/x86/kernel/alternative.c:489)
> [ 1.384579][ T0] Code: 3c 06 0f 85 4e 02 00 00 8b 85 ec fe ff ff 80 38 ff 0f 85 3f 02 00 00 80 78 01 15 0f 85 35 02 00 00 8b 8d ec fe ff ff 8b 41 02 <8b> 44 01 06 85 c0 74 17 89 c2 81 ea 60 18 7c c2 01 95 f3 fe ff ff
> All code
> ========
>     0:	3c 06                	cmp    $0x6,%al
>     2:	0f 85 4e 02 00 00    	jne    0x256
>     8:	8b 85 ec fe ff ff    	mov    -0x114(%rbp),%eax
>     e:	80 38 ff             	cmpb   $0xff,(%rax)
>    11:	0f 85 3f 02 00 00    	jne    0x256
>    17:	80 78 01 15          	cmpb   $0x15,0x1(%rax)
>    1b:	0f 85 35 02 00 00    	jne    0x256
>    21:	8b 8d ec fe ff ff    	mov    -0x114(%rbp),%ecx
>    27:	8b 41 02             	mov    0x2(%rcx),%eax
>    2a:*	8b 44 01 06          	mov    0x6(%rcx,%rax,1),%eax		<-- trapping instruction
>    2e:	85 c0                	test   %eax,%eax
>    30:	74 17                	je     0x49
>    32:	89 c2                	mov    %eax,%edx
>    34:	81 ea 60 18 7c c2    	sub    $0xc27c1860,%edx
>    3a:	01 95 f3 fe ff ff    	add    %edx,-0x10d(%rbp)
> 
> Code starting with the faulting instruction
> ===========================================
>     0:	8b 44 01 06          	mov    0x6(%rcx,%rax,1),%eax
>     4:	85 c0                	test   %eax,%eax
>     6:	74 17                	je     0x1f
>     8:	89 c2                	mov    %eax,%edx
>     a:	81 ea 60 18 7c c2    	sub    $0xc27c1860,%edx
>    10:	01 95 f3 fe ff ff    	add    %edx,-0x10d(%rbp)
> 
> 
> The kernel config and materials to reproduce are available at:
> https://download.01.org/0day-ci/archive/20231026/202310261032.76a10bc0-oliver.sang@intel.com

Yay, 32-bit code.

I'll update the patch to consider X86_32, which has no %rip relative indirect
call.


Juergen
kernel test robot Oct. 26, 2023, 9:02 a.m. UTC | #4 
Hi Juergen,

kernel test robot noticed the following build errors:

[auto build test ERROR on kvm/queue]
[also build test ERROR on tip/master linus/master v6.6-rc7 next-20231025]
[cannot apply to tip/x86/core kvm/linux-next tip/auto-latest]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Juergen-Gross/x86-paravirt-move-some-functions-and-defines-to-alternative/20231019-171709
base:   https://git.kernel.org/pub/scm/virt/kvm/kvm.git queue
patch link:    https://lore.kernel.org/r/20231019091520.14540-5-jgross%40suse.com
patch subject: [PATCH v3 4/5] x86/paravirt: switch mixed paravirt/alternative calls to alternative_2
config: x86_64-allyesconfig (https://download.01.org/0day-ci/archive/20231026/202310261653.LKIRqagq-lkp@intel.com/config)
compiler: gcc-12 (Debian 12.2.0-14) 12.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20231026/202310261653.LKIRqagq-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202310261653.LKIRqagq-lkp@intel.com/

All errors (new ones prefixed by >>):

   arch/x86/entry/entry_64.S: Assembler messages:
>> arch/x86/entry/entry_64.S:454: Error: no such instruction: `alt_call_instr'
   arch/x86/entry/entry_64.S:319:  Info: macro invoked from here
   arch/x86/entry/entry_64.S:1138:   Info: macro invoked from here


vim +454 arch/x86/entry/entry_64.S

6368558c37107b Thomas Gleixner 2020-05-21  442  
cfa82a00533f70 Thomas Gleixner 2020-02-25  443  /**
cfa82a00533f70 Thomas Gleixner 2020-02-25  444   * idtentry_mce_db - Macro to generate entry stubs for #MC and #DB
cfa82a00533f70 Thomas Gleixner 2020-02-25  445   * @vector:		Vector number
cfa82a00533f70 Thomas Gleixner 2020-02-25  446   * @asmsym:		ASM symbol for the entry point
cfa82a00533f70 Thomas Gleixner 2020-02-25  447   * @cfunc:		C function to be called
cfa82a00533f70 Thomas Gleixner 2020-02-25  448   *
cfa82a00533f70 Thomas Gleixner 2020-02-25  449   * The macro emits code to set up the kernel context for #MC and #DB
cfa82a00533f70 Thomas Gleixner 2020-02-25  450   *
cfa82a00533f70 Thomas Gleixner 2020-02-25  451   * If the entry comes from user space it uses the normal entry path
cfa82a00533f70 Thomas Gleixner 2020-02-25  452   * including the return to user space work and preemption checks on
cfa82a00533f70 Thomas Gleixner 2020-02-25  453   * exit.
cfa82a00533f70 Thomas Gleixner 2020-02-25 @454   *
cfa82a00533f70 Thomas Gleixner 2020-02-25  455   * If hits in kernel mode then it needs to go through the paranoid
cfa82a00533f70 Thomas Gleixner 2020-02-25  456   * entry as the exception can hit any random state. No preemption
cfa82a00533f70 Thomas Gleixner 2020-02-25  457   * check on exit to keep the paranoid path simple.
cfa82a00533f70 Thomas Gleixner 2020-02-25  458   */
cfa82a00533f70 Thomas Gleixner 2020-02-25  459  .macro idtentry_mce_db vector asmsym cfunc
cfa82a00533f70 Thomas Gleixner 2020-02-25  460  SYM_CODE_START(\asmsym)
4708ea14bef314 Josh Poimboeuf  2023-03-01  461  	UNWIND_HINT_IRET_ENTRY
8f93402b92d443 Peter Zijlstra  2022-03-08  462  	ENDBR
cfa82a00533f70 Thomas Gleixner 2020-02-25  463  	ASM_CLAC
c64cc2802a784e Lai Jiangshan   2022-04-21  464  	cld
cfa82a00533f70 Thomas Gleixner 2020-02-25  465  
cfa82a00533f70 Thomas Gleixner 2020-02-25  466  	pushq	$-1			/* ORIG_RAX: no syscall to restart */
cfa82a00533f70 Thomas Gleixner 2020-02-25  467  
cfa82a00533f70 Thomas Gleixner 2020-02-25  468  	/*
cfa82a00533f70 Thomas Gleixner 2020-02-25  469  	 * If the entry is from userspace, switch stacks and treat it as
cfa82a00533f70 Thomas Gleixner 2020-02-25  470  	 * a normal entry.
cfa82a00533f70 Thomas Gleixner 2020-02-25  471  	 */
cfa82a00533f70 Thomas Gleixner 2020-02-25  472  	testb	$3, CS-ORIG_RAX(%rsp)
cfa82a00533f70 Thomas Gleixner 2020-02-25  473  	jnz	.Lfrom_usermode_switch_stack_\@
cfa82a00533f70 Thomas Gleixner 2020-02-25  474  
c82965f9e53005 Chang S. Bae    2020-05-28  475  	/* paranoid_entry returns GS information for paranoid_exit in EBX. */
cfa82a00533f70 Thomas Gleixner 2020-02-25  476  	call	paranoid_entry
cfa82a00533f70 Thomas Gleixner 2020-02-25  477  
cfa82a00533f70 Thomas Gleixner 2020-02-25  478  	UNWIND_HINT_REGS
cfa82a00533f70 Thomas Gleixner 2020-02-25  479  
cfa82a00533f70 Thomas Gleixner 2020-02-25  480  	movq	%rsp, %rdi		/* pt_regs pointer */
cfa82a00533f70 Thomas Gleixner 2020-02-25  481  
cfa82a00533f70 Thomas Gleixner 2020-02-25  482  	call	\cfunc
cfa82a00533f70 Thomas Gleixner 2020-02-25  483  
cfa82a00533f70 Thomas Gleixner 2020-02-25  484  	jmp	paranoid_exit
cfa82a00533f70 Thomas Gleixner 2020-02-25  485  
cfa82a00533f70 Thomas Gleixner 2020-02-25  486  	/* Switch to the regular task stack and use the noist entry point */
cfa82a00533f70 Thomas Gleixner 2020-02-25  487  .Lfrom_usermode_switch_stack_\@:
e2dcb5f1390715 Thomas Gleixner 2020-05-21  488  	idtentry_body noist_\cfunc, has_error_code=0
cfa82a00533f70 Thomas Gleixner 2020-02-25  489
diff mbox series

Patch

diff --git a/arch/x86/include/asm/alternative.h b/arch/x86/include/asm/alternative.h
index dd63b96577e9..f6c0ff678e2e 100644
--- a/arch/x86/include/asm/alternative.h
+++ b/arch/x86/include/asm/alternative.h
@@ -89,6 +89,8 @@  struct alt_instr {
 	u8  replacementlen;	/* length of new instruction */
 } __packed;
 
+extern struct alt_instr __alt_instructions[], __alt_instructions_end[];
+
 /*
  * Debug flag that can be tested to see whether alternative
  * instructions were patched in already:
@@ -104,11 +106,10 @@  extern void apply_fineibt(s32 *start_retpoline, s32 *end_retpoine,
 			  s32 *start_cfi, s32 *end_cfi);
 
 struct module;
-struct paravirt_patch_site;
 
 struct callthunk_sites {
 	s32				*call_start, *call_end;
-	struct paravirt_patch_site	*pv_start, *pv_end;
+	struct alt_instr		*alt_start, *alt_end;
 };
 
 #ifdef CONFIG_CALL_THUNKS
diff --git a/arch/x86/include/asm/paravirt.h b/arch/x86/include/asm/paravirt.h
index 3749311d51c3..9c6c5cfa9fe2 100644
--- a/arch/x86/include/asm/paravirt.h
+++ b/arch/x86/include/asm/paravirt.h
@@ -740,20 +740,23 @@  void native_pv_lock_init(void) __init;
 
 #ifdef CONFIG_X86_64
 #ifdef CONFIG_PARAVIRT_XXL
+#ifdef CONFIG_DEBUG_ENTRY
 
 #define PARA_PATCH(off)		((off) / 8)
 #define PARA_SITE(ptype, ops)	_PVSITE(ptype, ops, .quad, 8)
 #define PARA_INDIRECT(addr)	*addr(%rip)
 
-#ifdef CONFIG_DEBUG_ENTRY
 .macro PARA_IRQ_save_fl
 	PARA_SITE(PARA_PATCH(PV_IRQ_save_fl),
 		  ANNOTATE_RETPOLINE_SAFE;
 		  call PARA_INDIRECT(pv_ops+PV_IRQ_save_fl);)
+	ANNOTATE_RETPOLINE_SAFE;
+	call PARA_INDIRECT(pv_ops+PV_IRQ_save_fl);
 .endm
 
-#define SAVE_FLAGS	ALTERNATIVE "PARA_IRQ_save_fl;", "pushf; pop %rax;", \
-				    ALT_NOT_XEN
+#define SAVE_FLAGS ALTERNATIVE_2 "PARA_IRQ_save_fl;",			\
+				 ALT_CALL_INSTR, ALT_CALL_ALWAYS,	\
+				 "pushf; pop %rax;", ALT_NOT_XEN
 #endif
 #endif /* CONFIG_PARAVIRT_XXL */
 #endif	/* CONFIG_X86_64 */
diff --git a/arch/x86/include/asm/paravirt_types.h b/arch/x86/include/asm/paravirt_types.h
index e99db1360d2a..323dca625eea 100644
--- a/arch/x86/include/asm/paravirt_types.h
+++ b/arch/x86/include/asm/paravirt_types.h
@@ -278,15 +278,11 @@  extern struct paravirt_patch_template pv_ops;
 #define NATIVE_LABEL(a,x,b) "\n\t.globl " a #x "_" #b "\n" a #x "_" #b ":\n\t"
 
 unsigned int paravirt_patch(u8 type, void *insn_buff, unsigned long addr, unsigned int len);
+#define paravirt_ptr(op)	[paravirt_opptr] "m" (pv_ops.op)
 
 int paravirt_disable_iospace(void);
 
-/*
- * This generates an indirect call based on the operation type number.
- * The type number, computed in PARAVIRT_PATCH, is derived from the
- * offset into the paravirt_patch_template structure, and can therefore be
- * freely converted back into a structure offset.
- */
+/* This generates an indirect call based on the operation type number. */
 #define PARAVIRT_CALL					\
 	ANNOTATE_RETPOLINE_SAFE				\
 	"call *%[paravirt_opptr];"
@@ -319,12 +315,6 @@  int paravirt_disable_iospace(void);
  * However, x86_64 also has to clobber all caller saved registers, which
  * unfortunately, are quite a bit (r8 - r11)
  *
- * The call instruction itself is marked by placing its start address
- * and size into the .parainstructions section, so that
- * apply_paravirt() in arch/i386/kernel/alternative.c can do the
- * appropriate patching under the control of the backend pv_init_ops
- * implementation.
- *
  * Unfortunately there's no way to get gcc to generate the args setup
  * for the call, and then allow the call itself to be generated by an
  * inline asm.  Because of this, we must do the complete arg setup and
@@ -428,9 +418,10 @@  int paravirt_disable_iospace(void);
 	({								\
 		PVOP_CALL_ARGS;						\
 		PVOP_TEST_NULL(op);					\
-		asm volatile(paravirt_alt(PARAVIRT_CALL)		\
+		asm volatile(ALTERNATIVE(PARAVIRT_CALL, ALT_CALL_INSTR,	\
+				ALT_CALL_ALWAYS)			\
 			     : call_clbr, ASM_CALL_CONSTRAINT		\
-			     : paravirt_type(op),			\
+			     : paravirt_ptr(op),			\
 			       ##__VA_ARGS__				\
 			     : "memory", "cc" extra_clbr);		\
 		ret;							\
@@ -441,10 +432,11 @@  int paravirt_disable_iospace(void);
 	({								\
 		PVOP_CALL_ARGS;						\
 		PVOP_TEST_NULL(op);					\
-		asm volatile(ALTERNATIVE(paravirt_alt(PARAVIRT_CALL),	\
-					 alt, cond)			\
+		asm volatile(ALTERNATIVE_2(PARAVIRT_CALL,		\
+				 ALT_CALL_INSTR, ALT_CALL_ALWAYS,	\
+				 alt, cond)				\
 			     : call_clbr, ASM_CALL_CONSTRAINT		\
-			     : paravirt_type(op),			\
+			     : paravirt_ptr(op),			\
 			       ##__VA_ARGS__				\
 			     : "memory", "cc" extra_clbr);		\
 		ret;							\
diff --git a/arch/x86/kernel/callthunks.c b/arch/x86/kernel/callthunks.c
index faa9f2299848..200ea8087ddb 100644
--- a/arch/x86/kernel/callthunks.c
+++ b/arch/x86/kernel/callthunks.c
@@ -238,14 +238,13 @@  patch_call_sites(s32 *start, s32 *end, const struct core_text *ct)
 }
 
 static __init_or_module void
-patch_paravirt_call_sites(struct paravirt_patch_site *start,
-			  struct paravirt_patch_site *end,
-			  const struct core_text *ct)
+patch_alt_call_sites(struct alt_instr *start, struct alt_instr *end,
+		     const struct core_text *ct)
 {
-	struct paravirt_patch_site *p;
+	struct alt_instr *a;
 
-	for (p = start; p < end; p++)
-		patch_call(p->instr, ct);
+	for (a = start; a < end; a++)
+		patch_call((u8 *)&a->instr_offset + a->instr_offset, ct);
 }
 
 static __init_or_module void
@@ -253,7 +252,7 @@  callthunks_setup(struct callthunk_sites *cs, const struct core_text *ct)
 {
 	prdbg("Patching call sites %s\n", ct->name);
 	patch_call_sites(cs->call_start, cs->call_end, ct);
-	patch_paravirt_call_sites(cs->pv_start, cs->pv_end, ct);
+	patch_alt_call_sites(cs->alt_start, cs->alt_end, ct);
 	prdbg("Patching call sites done%s\n", ct->name);
 }
 
@@ -262,8 +261,8 @@  void __init callthunks_patch_builtin_calls(void)
 	struct callthunk_sites cs = {
 		.call_start	= __call_sites,
 		.call_end	= __call_sites_end,
-		.pv_start	= __parainstructions,
-		.pv_end		= __parainstructions_end
+		.alt_start	= __alt_instructions,
+		.alt_end	= __alt_instructions_end
 	};
 
 	if (!cpu_feature_enabled(X86_FEATURE_CALL_DEPTH))
diff --git a/arch/x86/kernel/module.c b/arch/x86/kernel/module.c
index 5f71a0cf4399..e18914c0e38a 100644
--- a/arch/x86/kernel/module.c
+++ b/arch/x86/kernel/module.c
@@ -276,7 +276,7 @@  int module_finalize(const Elf_Ehdr *hdr,
 		    struct module *me)
 {
 	const Elf_Shdr *s, *alt = NULL, *locks = NULL,
-		*para = NULL, *orc = NULL, *orc_ip = NULL,
+		*orc = NULL, *orc_ip = NULL,
 		*retpolines = NULL, *returns = NULL, *ibt_endbr = NULL,
 		*calls = NULL, *cfi = NULL;
 	char *secstrings = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
@@ -286,8 +286,6 @@  int module_finalize(const Elf_Ehdr *hdr,
 			alt = s;
 		if (!strcmp(".smp_locks", secstrings + s->sh_name))
 			locks = s;
-		if (!strcmp(".parainstructions", secstrings + s->sh_name))
-			para = s;
 		if (!strcmp(".orc_unwind", secstrings + s->sh_name))
 			orc = s;
 		if (!strcmp(".orc_unwind_ip", secstrings + s->sh_name))
@@ -304,14 +302,6 @@  int module_finalize(const Elf_Ehdr *hdr,
 			ibt_endbr = s;
 	}
 
-	/*
-	 * See alternative_instructions() for the ordering rules between the
-	 * various patching types.
-	 */
-	if (para) {
-		void *pseg = (void *)para->sh_addr;
-		apply_paravirt(pseg, pseg + para->sh_size);
-	}
 	if (retpolines || cfi) {
 		void *rseg = NULL, *cseg = NULL;
 		unsigned int rsize = 0, csize = 0;
@@ -341,7 +331,7 @@  int module_finalize(const Elf_Ehdr *hdr,
 		void *aseg = (void *)alt->sh_addr;
 		apply_alternatives(aseg, aseg + alt->sh_size);
 	}
-	if (calls || para) {
+	if (calls || alt) {
 		struct callthunk_sites cs = {};
 
 		if (calls) {
@@ -349,9 +339,9 @@  int module_finalize(const Elf_Ehdr *hdr,
 			cs.call_end = (void *)calls->sh_addr + calls->sh_size;
 		}
 
-		if (para) {
-			cs.pv_start = (void *)para->sh_addr;
-			cs.pv_end = (void *)para->sh_addr + para->sh_size;
+		if (alt) {
+			cs.alt_start = (void *)alt->sh_addr;
+			cs.alt_end = (void *)alt->sh_addr + alt->sh_size;
 		}
 
 		callthunks_patch_module_calls(&cs, me);