From patchwork Tue Oct 17 05:24:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "D, Lakshmi Sowjanya" X-Patchwork-Id: 153909 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp3911244vqb; Mon, 16 Oct 2023 22:25:56 -0700 (PDT) X-Google-Smtp-Source: AGHT+IF11pdluegjJW9kvQcMoY+/pb0o4nrJsy7gg7ZQ0Ko788Nx8okl3n3H+7HPLcBCZvPVh8vK X-Received: by 2002:a05:6a20:8f2a:b0:163:d382:ba84 with SMTP id b42-20020a056a208f2a00b00163d382ba84mr1286039pzk.5.1697520356038; Mon, 16 Oct 2023 22:25:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697520356; cv=none; d=google.com; s=arc-20160816; b=mH2UUQFS3k1g2OWWRvIEKmtX7xTnjCUmsSfIyPlBdyZXh9/VfLqWxW8UJj1zbSUnP/ 7kkEjQBsM2+ls79Z9yJqkHNvu6bngye5X3v6RZm7uut5XQ+4qVy9Rf7dvEIs5e/bDx3r l3/9ehR2C/j1b1MiCWQ5V07vVLmwrBfTb6TY1GI8qGnx57UdYJxhbOT7YBddPdvfvZVt OqZvGMb6Rs6/fwUhpdWw8rEB9ul8e0x0lcLf4L4nG9T8N8qd0qvTjMRhZ1j56ohU9AD9 ssyIKWG/mTnarZT6Iz3QW/2SxdqUFqMtHD4o9QrBlg9dksqIaQIYXDSikAGYhkga2TlI GaNQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:references:in-reply-to:message-id:date:subject :cc:to:from:dkim-signature; bh=e3uIA7YdGwKL+1rmjB0oNfVj4YQhAV5iY4rZeofP9ns=; fh=O1j13Mu+YXmD8t08/npRM3Uw5SAxbjMOF7NW+nWn+v8=; b=s78/m8o6my3prT02ptQ6v7dWESTMTJ0lFENV6c5k5liEBitoLFB6/MhnV9/uzsgEkA OH2o/3vP+xmSToorU5gizUwT3GypujxVsRxY5HFdJ6vZedvWEKg2QSlj6OdDErHKTn+m nnpXuW3lWwjd3e/C8RWqXDiTBQnprqx1CbEESLaH9VkH4uLBlzeuM5YHn0PG5lJvXrI1 LlzpUOM7wqcUm7sZokvBwfcN/LzX2+UJVFhYpuGh/oF9lWF/sDxaMyhi6m9Po7uw5Lle DS4khMqQic6wMGf03F5LjMyCAbH8jIAWQDWTiwIJAF4szbrnT/9v0vyffAkb/otek09a lfMg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b="UuJ/N1K0"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:1 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from morse.vger.email (morse.vger.email. [2620:137:e000::3:1]) by mx.google.com with ESMTPS id h9-20020a170902748900b001c5de4a5b4esi901311pll.597.2023.10.16.22.25.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Oct 2023 22:25:56 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:1 as permitted sender) client-ip=2620:137:e000::3:1; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b="UuJ/N1K0"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:1 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by morse.vger.email (Postfix) with ESMTP id 70FB180473FE; Mon, 16 Oct 2023 22:25:53 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at morse.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234410AbjJQFZn (ORCPT + 19 others); Tue, 17 Oct 2023 01:25:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33370 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234622AbjJQFZY (ORCPT ); Tue, 17 Oct 2023 01:25:24 -0400 Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.24]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 205DCD7E; Mon, 16 Oct 2023 22:25:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1697520311; x=1729056311; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=jjh/SQd4MKcrmxk2Fa2s9sU0ZxSrHMLhxc5ThbaVuPc=; b=UuJ/N1K0xGPfPqRXX8bzCpvgU1tOAzBuBp5rQMqscuYk7fM0lqhN4I9x fWtRPfkGm/zpJhBHvvMiUaFyh0NXg3C1wuelRwLqKK3uxJfBOTY4tscSN vDhiVVkO4WL1nwIBMiAW81YRxQie+TdObq1FFCivcdUpqjSRWoENX6j+R Kmo4LTyOWnlO6s5yrBva3gJ9TDmqcqXzZ4sQciW8kk2/5IZhRBxcmHtG1 IM+fweb40tUuYdqfq3DosCNrZsRotOdAuHOaw8rUDS2IeoKX3xSU5Yb7k qrumuBRiDX/UnvEMzA4LhRL3HYuY3MqsMcIUJWOlTLRks2qJe54JJaoG6 w==; X-IronPort-AV: E=McAfee;i="6600,9927,10865"; a="388561735" X-IronPort-AV: E=Sophos;i="6.03,231,1694761200"; d="scan'208";a="388561735" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Oct 2023 22:25:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10865"; a="1087357990" X-IronPort-AV: E=Sophos;i="6.03,231,1694761200"; d="scan'208";a="1087357990" Received: from inlubt0316.iind.intel.com ([10.191.20.213]) by fmsmga005.fm.intel.com with ESMTP; 16 Oct 2023 22:25:06 -0700 From: lakshmi.sowjanya.d@intel.com To: tglx@linutronix.de, jstultz@google.com, giometti@enneenne.com, corbet@lwn.net, linux-kernel@vger.kernel.org Cc: x86@kernel.org, linux-doc@vger.kernel.org, andriy.shevchenko@linux.intel.com, eddie.dong@intel.com, christopher.s.hall@intel.com, pandith.n@intel.com, mallikarjunappa.sangannavar@intel.com, thejesh.reddy.t.r@intel.com, lakshmi.sowjanya.d@intel.com Subject: [PATCH v1 2/6] x86/tsc: Convert Time Stamp Counter (TSC) value to Always Running Timer (ART) Date: Tue, 17 Oct 2023 10:54:53 +0530 Message-Id: <20231017052457.25287-3-lakshmi.sowjanya.d@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20231017052457.25287-1-lakshmi.sowjanya.d@intel.com> References: <20231017052457.25287-1-lakshmi.sowjanya.d@intel.com> X-Spam-Status: No, score=-0.9 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on morse.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (morse.vger.email [0.0.0.0]); Mon, 16 Oct 2023 22:25:53 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779979104707108376 X-GMAIL-MSGID: 1779979104707108376 From: Lakshmi Sowjanya D PPS generators trigger pulses according to system time/TSC. Timed I/O hardware understands time in ART (Always Running Timer). There is a need to convert TSC time to ART. The conversion is done using the detected art_to_tsc_numerator and denominator. ART = TSC * tsc_to_art_denominator / tsc_to_art_numerator Co-developed-by: Christopher Hall Signed-off-by: Christopher Hall Signed-off-by: Lakshmi Sowjanya D Reviewed-by: Eddie Dong --- arch/x86/include/asm/tsc.h | 3 +++ arch/x86/kernel/tsc.c | 32 ++++++++++++++++++++++++++++++++ 2 files changed, 35 insertions(+) diff --git a/arch/x86/include/asm/tsc.h b/arch/x86/include/asm/tsc.h index 594fce0ca744..f5cff8d4f61e 100644 --- a/arch/x86/include/asm/tsc.h +++ b/arch/x86/include/asm/tsc.h @@ -8,6 +8,8 @@ #include #include +struct system_counterval_t; + /* * Standard way to access the cycle counter. */ @@ -27,6 +29,7 @@ static inline cycles_t get_cycles(void) } #define get_cycles get_cycles +extern int convert_tsc_to_art(const struct system_counterval_t *tsc, u64 *art); extern struct system_counterval_t convert_art_to_tsc(u64 art); extern struct system_counterval_t convert_art_ns_to_tsc(u64 art_ns); diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index 15f97c0abc9d..92b800015d8f 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c @@ -2,6 +2,7 @@ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt #include +#include #include #include #include @@ -1294,6 +1295,37 @@ int unsynchronized_tsc(void) return 0; } +/* + * Converts input TSC to the corresponding ART value using conversion + * factors discovered by detect_art(). + * + * Return: 0 on success, -errno on failure. + */ +int convert_tsc_to_art(const struct system_counterval_t *system_counter, + u64 *art) +{ + u64 tmp, res, rem; + /* ART = TSC * tsc_to_art_denominator / tsc_to_art_numerator */ + struct u32_fract tsc_to_art = { + .numerator = art_to_tsc_denominator, + .denominator = art_to_tsc_numerator, + }; + + if (system_counter->cs != art_related_clocksource) + return -EINVAL; + + res = system_counter->cycles - art_to_tsc_offset; + rem = do_div(res, tsc_to_art.denominator); + + tmp = rem * tsc_to_art.numerator; + do_div(tmp, tsc_to_art.denominator); + + *art = res * tsc_to_art.numerator + tmp; + + return 0; +} +EXPORT_SYMBOL_GPL(convert_tsc_to_art); + /* * Convert ART to TSC given numerator/denominator found in detect_art() */