[net-next,v2,5/5] ARM64: dts: marvell: Fix some common switch mistakes

Message ID 20231014-marvell-88e6152-wan-led-v2-5-7fca08b68849@linaro.org
State New
Headers
Series Create a binding for the Marvell MV88E6xxx DSA switches |

Commit Message

Linus Walleij Oct. 14, 2023, 8:51 p.m. UTC
  Fix some errors in the Marvell MV88E6xxx switch descriptions:
- The top node had no address size or cells.
- switch0@0 is not OK, should be switch@0.
- port@a is not normal port naming, use decimal port@10.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
 .../boot/dts/marvell/armada-3720-espressobin.dtsi  |  4 +--
 .../boot/dts/marvell/armada-3720-gl-mv1000.dts     |  4 +--
 .../boot/dts/marvell/armada-3720-turris-mox.dts    | 32 +++++++++++-----------
 .../boot/dts/marvell/armada-7040-mochabin.dts      |  2 --
 .../dts/marvell/armada-8040-clearfog-gt-8k.dts     |  2 +-
 arch/arm64/boot/dts/marvell/cn9130-crb.dtsi        |  6 ++--
 6 files changed, 21 insertions(+), 29 deletions(-)
  

Patch

diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi
index 5fc613d24151..b526efeee293 100644
--- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi
@@ -145,10 +145,8 @@  &usb2 {
 };
 
 &mdio {
-	switch0: switch0@1 {
+	switch0: switch@1 {
 		compatible = "marvell,mv88e6085";
-		#address-cells = <1>;
-		#size-cells = <0>;
 		reg = <1>;
 
 		dsa,member = <0 0>;
diff --git a/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts b/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts
index b1b45b4fa9d4..5de4417f929c 100644
--- a/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts
+++ b/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts
@@ -152,10 +152,8 @@  &uart0 {
 };
 
 &mdio {
-	switch0: switch0@1 {
+	switch0: switch@1 {
 		compatible = "marvell,mv88e6085";
-		#address-cells = <1>;
-		#size-cells = <0>;
 		reg = <1>;
 
 		dsa,member = <0 0>;
diff --git a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts
index 9eab2bb22134..ea66ba5a9762 100644
--- a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts
+++ b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts
@@ -305,7 +305,7 @@  phy1: ethernet-phy@1 {
 	};
 
 	/* switch nodes are enabled by U-Boot if modules are present */
-	switch0@10 {
+	switch@10 {
 		compatible = "marvell,mv88e6190";
 		reg = <0x10>;
 		dsa,member = <0 0>;
@@ -410,8 +410,8 @@  port@9 {
 				managed = "in-band-status";
 			};
 
-			switch0port10: port@a {
-				reg = <0xa>;
+			switch0port10: port@10 {
+				reg = <10>;
 				label = "dsa";
 				phy-mode = "2500base-x";
 				managed = "in-band-status";
@@ -419,8 +419,8 @@  switch0port10: port@a {
 				status = "disabled";
 			};
 
-			port-sfp@a {
-				reg = <0xa>;
+			port-sfp@10 {
+				reg = <10>;
 				label = "sfp";
 				sfp = <&sfp>;
 				phy-mode = "sgmii";
@@ -430,7 +430,7 @@  port-sfp@a {
 		};
 	};
 
-	switch0@2 {
+	switch@2 {
 		compatible = "marvell,mv88e6085";
 		reg = <0x2>;
 		dsa,member = <0 0>;
@@ -497,7 +497,7 @@  port@5 {
 		};
 	};
 
-	switch1@11 {
+	switch@11 {
 		compatible = "marvell,mv88e6190";
 		reg = <0x11>;
 		dsa,member = <0 1>;
@@ -602,8 +602,8 @@  switch1port9: port@9 {
 				link = <&switch0port10>;
 			};
 
-			switch1port10: port@a {
-				reg = <0xa>;
+			switch1port10: port@10 {
+				reg = <10>;
 				label = "dsa";
 				phy-mode = "2500base-x";
 				managed = "in-band-status";
@@ -611,8 +611,8 @@  switch1port10: port@a {
 				status = "disabled";
 			};
 
-			port-sfp@a {
-				reg = <0xa>;
+			port-sfp@10 {
+				reg = <10>;
 				label = "sfp";
 				sfp = <&sfp>;
 				phy-mode = "sgmii";
@@ -622,7 +622,7 @@  port-sfp@a {
 		};
 	};
 
-	switch1@2 {
+	switch@2 {
 		compatible = "marvell,mv88e6085";
 		reg = <0x2>;
 		dsa,member = <0 1>;
@@ -689,7 +689,7 @@  port@5 {
 		};
 	};
 
-	switch2@12 {
+	switch@12 {
 		compatible = "marvell,mv88e6190";
 		reg = <0x12>;
 		dsa,member = <0 2>;
@@ -794,8 +794,8 @@  switch2port9: port@9 {
 				link = <&switch1port10 &switch0port10>;
 			};
 
-			port-sfp@a {
-				reg = <0xa>;
+			port-sfp@10 {
+				reg = <10>;
 				label = "sfp";
 				sfp = <&sfp>;
 				phy-mode = "sgmii";
@@ -805,7 +805,7 @@  port-sfp@a {
 		};
 	};
 
-	switch2@2 {
+	switch@2 {
 		compatible = "marvell,mv88e6085";
 		reg = <0x2>;
 		dsa,member = <0 2>;
diff --git a/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts b/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts
index 48202810bf78..3cc794fcf12e 100644
--- a/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts
+++ b/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts
@@ -303,8 +303,6 @@  eth2phy: ethernet-phy@1 {
 	/* 88E6141 Topaz switch */
 	switch: switch@3 {
 		compatible = "marvell,mv88e6085";
-		#address-cells = <1>;
-		#size-cells = <0>;
 		reg = <3>;
 
 		pinctrl-names = "default";
diff --git a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
index 4125202028c8..7a25ea36b565 100644
--- a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
+++ b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
@@ -497,7 +497,7 @@  ge_phy: ethernet-phy@0 {
 		reset-deassert-us = <10000>;
 	};
 
-	switch0: switch0@4 {
+	switch0: switch@4 {
 		compatible = "marvell,mv88e6085";
 		reg = <4>;
 		pinctrl-names = "default";
diff --git a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
index 32cfb3e2efc3..2f6281b66467 100644
--- a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
+++ b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi
@@ -207,11 +207,9 @@  phy0: ethernet-phy@0 {
 		reg = <0>;
 	};
 
-	switch6: switch0@6 {
+	switch6: switch@6 {
 		/* Actual device is MV88E6393X */
 		compatible = "marvell,mv88e6190";
-		#address-cells = <1>;
-		#size-cells = <0>;
 		reg = <6>;
 		interrupt-parent = <&cp0_gpio1>;
 		interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
@@ -280,7 +278,7 @@  port@9 {
 				managed = "in-band-status";
 			};
 
-			port@a {
+			port@10 {
 				reg = <10>;
 				ethernet = <&cp0_eth0>;
 				phy-mode = "10gbase-r";