From patchwork Fri Oct 13 11:20:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Ilpo_J=C3=A4rvinen?= X-Patchwork-Id: 152508 Return-Path: Delivered-To: ouuuleilei@gmail.com Received: by 2002:a05:612c:2908:b0:403:3b70:6f57 with SMTP id ib8csp1816432vqb; Fri, 13 Oct 2023 04:21:23 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGjhkCdw/t0ar4D9kqTewN/ya8gbEcGMO+NIMJZR1/sM2upSbDy2KmhuqJk7hVTbScUeNYZ X-Received: by 2002:a17:90b:17c3:b0:27c:f653:37b2 with SMTP id me3-20020a17090b17c300b0027cf65337b2mr8928320pjb.1.1697196083589; Fri, 13 Oct 2023 04:21:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697196083; cv=none; d=google.com; s=arc-20160816; b=WOt7S8Tz8WGsf+TO7DcP1cZo/CcILu1mkdNljUE4wuFfWeH/xwvzdAmv4Ho1B11BNV QuhdyK1+y98G5HqTyjraIMJ2MAbDKHI4AhmLoB5fFywHp4i5I3dBTT5ldvOVR/n5rtGj 1K3yUIRedCKepeMLuBe3hp6mGZFUQu8AMDJwvhwrLDU8X0kNuqbeKOMsrTjVcPPKdDgj 5kzW08+ojDz2TrLmAVLLjIEEcW2ahbzlgfspYQFyc0BPpBs6/Dt1Wsy29Ly7cq6PDzeY Gf7QP+kChGinUt8mwkpTLQuj9OsOp8jAAjIps9QinHslA1Gaxz7DM9Y9i9mh+OT7hbmC RqhA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=0d87Ot63vkbGXz6zrWlvFN4w8ApNg5rBaRCTprPFNAI=; fh=v/gTcuW4RMBt2xtkjZeSkQod61XQ/SEN0dgeRBh6GoU=; b=lj+sRvGVfHdHUN0UdXfm6y5IWrY0S/MYuT9Drxhh3j54dfiWObap+L9+wXHvSSAIcE C97vB1IizagqFtRJUx0Pbsx2AjORaeveZVG/idFsn2rqqQk/14Tqa7X4+EAb/5kqcp/R 1sRQ5B3o/XGygf578NJqco+kJULziHp9j/JWidQ7zxtpNX6BOD5oh9dwDd106RnH2Jbo ZwmPP1XOtbj+azcfH7XO1ELPNxA3epuHOV8NpK5W5p+Xoyupto9ZEJYhgdSsGNHdHCgx EPiPfa4S/QBq0gcPnNjfASuZ26MUVh/bxoJQKEWpDKwlrK6Q8OMS+5aQoZwJvGQDkddL J/Jw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=W9IrtXhz; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:4 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from howler.vger.email (howler.vger.email. [2620:137:e000::3:4]) by mx.google.com with ESMTPS id fw21-20020a17090b129500b0026810b074afsi3530016pjb.3.2023.10.13.04.21.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 13 Oct 2023 04:21:23 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:4 as permitted sender) client-ip=2620:137:e000::3:4; Authentication-Results: mx.google.com; dkim=pass header.i=@intel.com header.s=Intel header.b=W9IrtXhz; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 2620:137:e000::3:4 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by howler.vger.email (Postfix) with ESMTP id 04B9980B1BD2; Fri, 13 Oct 2023 04:21:21 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at howler.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231166AbjJMLUo (ORCPT + 19 others); Fri, 13 Oct 2023 07:20:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56470 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231292AbjJMLUj (ORCPT ); Fri, 13 Oct 2023 07:20:39 -0400 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 34307F4; Fri, 13 Oct 2023 04:20:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1697196035; x=1728732035; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=dkn+65kr19++pCpCEps7bBc1itglQiK0Qt3T2dobeF0=; b=W9IrtXhzDjyiOWt3JwZSggkZFykbj/FS9fkU4uz2b8tpZDm8nw2pXA/9 Rlso3Kz00YrSeDYid4MsXEAeU5HrQfBqtyj/+RL/Alre0RzNL0ILT2Jxa BzcFhEvbT7l0d398r7UvIu2oa2PkzBeu9k2a95+m1Lietnoxal8pn+gzA c/j2G/H1SWnLO7/g3TbepSf8zmQHSX1oF7tZWZrwcxK1iwc8i0yW/tuWW dtPXRFejyKTf/QxfkI2GwAW5yCmYUAduH1vSzZdzqBxbpS7djg4mxkn4f 14zQAdcZuqAdGl9nwn59UJbKP/bpJWOVzuYpePeIRmdgPp4PT6uD8iF5N w==; X-IronPort-AV: E=McAfee;i="6600,9927,10861"; a="3759008" X-IronPort-AV: E=Sophos;i="6.03,222,1694761200"; d="scan'208";a="3759008" Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Oct 2023 04:20:34 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10861"; a="1086104467" X-IronPort-AV: E=Sophos;i="6.03,222,1694761200"; d="scan'208";a="1086104467" Received: from rhaeussl-mobl.ger.corp.intel.com (HELO localhost) ([10.252.58.47]) by fmsmga005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Oct 2023 04:20:31 -0700 From: =?utf-8?q?Ilpo_J=C3=A4rvinen?= To: linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Jonathan Cameron Cc: linux-kernel@vger.kernel.org, =?utf-8?q?Ilpo_J=C3=A4rvinen?= Subject: [PATCH 2/2] PCI/DPC: Use defines with register fields Date: Fri, 13 Oct 2023 14:20:04 +0300 Message-Id: <20231013112004.4239-3-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20231013112004.4239-1-ilpo.jarvinen@linux.intel.com> References: <20231013112004.4239-1-ilpo.jarvinen@linux.intel.com> MIME-Version: 1.0 X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on howler.vger.email Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (howler.vger.email [0.0.0.0]); Fri, 13 Oct 2023 04:21:21 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779639080379795126 X-GMAIL-MSGID: 1779639080379795126 Use defines instead of literals and replace custom masking and shifts with FIELD_GET() where it makes sense. While at it, group PCI_EXP_DPC_CTL RMW and pci_info() lines together as it makes the code intent slightly easier to follow. Signed-off-by: Ilpo Järvinen --- drivers/pci/pcie/dpc.c | 39 ++++++++++++++++++++++++--------------- 1 file changed, 24 insertions(+), 15 deletions(-) diff --git a/drivers/pci/pcie/dpc.c b/drivers/pci/pcie/dpc.c index 3ceed8e3de41..81e06639cb8a 100644 --- a/drivers/pci/pcie/dpc.c +++ b/drivers/pci/pcie/dpc.c @@ -9,6 +9,7 @@ #define dev_fmt(fmt) "DPC: " fmt #include +#include #include #include #include @@ -202,7 +203,7 @@ static void dpc_process_rp_pio_error(struct pci_dev *pdev) /* Get First Error Pointer */ pci_read_config_word(pdev, cap + PCI_EXP_DPC_STATUS, &dpc_status); - first_error = (dpc_status & 0x1f00) >> 8; + first_error = FIELD_GET(PCI_EXP_DPC_RP_PIO_FEP, dpc_status); for (i = 0; i < ARRAY_SIZE(rp_pio_error_string); i++) { if ((status & ~mask) & (1 << i)) @@ -270,20 +271,27 @@ void dpc_process_error(struct pci_dev *pdev) pci_info(pdev, "containment event, status:%#06x source:%#06x\n", status, source); - reason = (status & PCI_EXP_DPC_STATUS_TRIGGER_RSN) >> 1; - ext_reason = (status & PCI_EXP_DPC_STATUS_TRIGGER_RSN_EXT) >> 5; + reason = status & PCI_EXP_DPC_STATUS_TRIGGER_RSN; + ext_reason = status & PCI_EXP_DPC_STATUS_TRIGGER_RSN_EXT; pci_warn(pdev, "%s detected\n", - (reason == 0) ? "unmasked uncorrectable error" : - (reason == 1) ? "ERR_NONFATAL" : - (reason == 2) ? "ERR_FATAL" : - (ext_reason == 0) ? "RP PIO error" : - (ext_reason == 1) ? "software trigger" : - "reserved error"); + (reason == PCI_EXP_DPC_STATUS_TRIGGER_RSN_UNCOR) ? + "unmasked uncorrectable error" : + (reason == PCI_EXP_DPC_STATUS_TRIGGER_RSN_NFE) ? + "ERR_NONFATAL" : + (reason == PCI_EXP_DPC_STATUS_TRIGGER_RSN_FE) ? + "ERR_FATAL" : + (ext_reason == PCI_EXP_DPC_STATUS_TRIGGER_RSN_RP_PIO) ? + "RP PIO error" : + (ext_reason == PCI_EXP_DPC_STATUS_TRIGGER_RSN_SW_TRIGGER) ? + "software trigger" : + "reserved error"); /* show RP PIO error detail information */ - if (pdev->dpc_rp_extensions && reason == 3 && ext_reason == 0) + if (pdev->dpc_rp_extensions && + reason == PCI_EXP_DPC_STATUS_TRIGGER_RSN_IN_EXT && + ext_reason == PCI_EXP_DPC_STATUS_TRIGGER_RSN_RP_PIO) dpc_process_rp_pio_error(pdev); - else if (reason == 0 && + else if (reason == PCI_EXP_DPC_STATUS_TRIGGER_RSN_UNCOR && dpc_get_aer_uncorrect_severity(pdev, &info) && aer_get_device_error_info(pdev, &info)) { aer_print_error(pdev, &info); @@ -338,7 +346,7 @@ void pci_dpc_init(struct pci_dev *pdev) /* Quirks may set dpc_rp_log_size if device or firmware is buggy */ if (!pdev->dpc_rp_log_size) { pdev->dpc_rp_log_size = - (cap & PCI_EXP_DPC_RP_PIO_LOG_SIZE) >> 8; + FIELD_GET(PCI_EXP_DPC_RP_PIO_LOG_SIZE, cap); if (pdev->dpc_rp_log_size < 4 || pdev->dpc_rp_log_size > 9) { pci_err(pdev, "RP PIO log size %u is invalid\n", pdev->dpc_rp_log_size); @@ -368,12 +376,13 @@ static int dpc_probe(struct pcie_device *dev) } pci_read_config_word(pdev, pdev->dpc_cap + PCI_EXP_DPC_CAP, &cap); - pci_read_config_word(pdev, pdev->dpc_cap + PCI_EXP_DPC_CTL, &ctl); - ctl = (ctl & 0xfff4) | PCI_EXP_DPC_CTL_EN_FATAL | PCI_EXP_DPC_CTL_INT_EN; + pci_read_config_word(pdev, pdev->dpc_cap + PCI_EXP_DPC_CTL, &ctl); + ctl |= PCI_EXP_DPC_CTL_EN_FATAL | PCI_EXP_DPC_CTL_INT_EN; + ctl &= ~PCI_EXP_DPC_CTL_EN_NONFATAL; pci_write_config_word(pdev, pdev->dpc_cap + PCI_EXP_DPC_CTL, ctl); - pci_info(pdev, "enabled with IRQ %d\n", dev->irq); + pci_info(pdev, "enabled with IRQ %d\n", dev->irq); pci_info(pdev, "error containment capabilities: Int Msg #%d, RPExt%c PoisonedTLP%c SwTrigger%c RP PIO Log %d, DL_ActiveErr%c\n", cap & PCI_EXP_DPC_IRQ, FLAG(cap, PCI_EXP_DPC_CAP_RP_EXT), FLAG(cap, PCI_EXP_DPC_CAP_POISONED_TLP),