diff mbox series

[v1,11/13] riscv: add ISA extension probing for Zvfh[min]

Message ID	20231011111438.909552-12-cleger@rivosinc.com
State	New
Headers	Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.37 as permitted sender) client-ip=23.128.96.37; From: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= <cleger@rivosinc.com> To: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org Cc: =?utf-8?b?Q2zDqW1lbnQgTMOpZ2Vy?= <cleger@rivosinc.com>, Palmer Dabbelt <palmer@rivosinc.com>, Paul Walmsley <paul.walmsley@sifive.com>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Albert Ou <aou@eecs.berkeley.edu>, Jonathan Corbet <corbet@lwn.net>, Andrew Jones <ajones@ventanamicro.com>, Evan Green <evan@rivosinc.com>, Conor Dooley <conor@kernel.org> Subject: [PATCH v1 11/13] riscv: add ISA extension probing for Zvfh[min] Date: Wed, 11 Oct 2023 13:14:36 +0200 Message-ID: <20231011111438.909552-12-cleger@rivosinc.com> In-Reply-To: <20231011111438.909552-1-cleger@rivosinc.com> References: <20231011111438.909552-1-cleger@rivosinc.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk
Series	riscv: report more ISA extensions through hwprobe \| [v1,00/13] riscv: report more ISA extensions through hwprobe [v1,01/13] riscv: fatorize hwprobe ISA extension reporting [v1,02/13] riscv: add ISA extension probing for Zv* extensions [v1,03/13] riscv: hwprobe: export Zv* ISA extensions [v1,04/13] dt-bindings: riscv: add Zv* ratified crypto ISA extensions description [v1,05/13] riscv: add ISA extension probing for Zfh/Zfhmin [v1,06/13] riscv: hwprobe: export Zfh/Zfhmin ISA extensions [v1,07/13] dt-bindings: riscv: add Zfh/Zfhmin ISA extensions description [v1,08/13] riscv: add ISA extension probing for Zihintntl [v1,09/13] riscv: hwprobe: export Zhintntl ISA extension [v1,10/13] dt-bindings: riscv: add Zihintntl ISA extension description [v1,11/13] riscv: add ISA extension probing for Zvfh[min] [v1,12/13] riscv: hwprobe: export Zvfh[min] ISA extensions [v1,13/13] dt-bindings: riscv: add Zvfh[min] ISA extension description

Commit Message

Clément Léger Oct. 11, 2023, 11:14 a.m. UTC

  Add probing for Zvfh[min] ISA extension[1] which were ratified in
june 2023 around commit e2ccd0548d6c ("Remove draft warnings from
Zvfh[min]") in riscv-v-spec[2].

[1] https://drive.google.com/file/d/1_Yt60HGAf1r1hx7JnsIptw0sqkBd9BQ8/view
[2] https://github.com/riscv/riscv-v-spec/commits/e2ccd0548d6c

Signed-off-by: Clément Léger <cleger@rivosinc.com>
---
 arch/riscv/include/asm/hwcap.h | 2 ++
 arch/riscv/kernel/cpufeature.c | 2 ++
 2 files changed, 4 insertions(+)

diff mbox series

Patch

diff --git a/arch/riscv/include/asm/hwcap.h b/arch/riscv/include/asm/hwcap.h
index 1f09b8b3da2a..ea141cfb8f9c 100644
--- a/arch/riscv/include/asm/hwcap.h
+++ b/arch/riscv/include/asm/hwcap.h
@@ -77,6 +77,8 @@ 
 #define RISCV_ISA_EXT_ZFH		59
 #define RISCV_ISA_EXT_ZFHMIN		60
 #define RISCV_ISA_EXT_ZIHINTNTL		61
+#define RISCV_ISA_EXT_ZVFH		62
+#define RISCV_ISA_EXT_ZVFHMIN		63
 
 #define RISCV_ISA_EXT_MAX		64
 
diff --git a/arch/riscv/kernel/cpufeature.c b/arch/riscv/kernel/cpufeature.c
index 136e90263ba2..f17b9aca5fba 100644
--- a/arch/riscv/kernel/cpufeature.c
+++ b/arch/riscv/kernel/cpufeature.c
@@ -179,6 +179,8 @@  const struct riscv_isa_ext_data riscv_isa_ext[] = {
 	__RISCV_ISA_EXT_DATA(zbs, RISCV_ISA_EXT_ZBS),
 	__RISCV_ISA_EXT_DATA(zvbb, RISCV_ISA_EXT_ZVBB),
 	__RISCV_ISA_EXT_DATA(zvbc, RISCV_ISA_EXT_ZVBC),
+	__RISCV_ISA_EXT_DATA(zvfh, RISCV_ISA_EXT_ZVFH),
+	__RISCV_ISA_EXT_DATA(zvfhmin, RISCV_ISA_EXT_ZVFHMIN),
 	__RISCV_ISA_EXT_DATA(zvkb, RISCV_ISA_EXT_ZVKB),
 	__RISCV_ISA_EXT_DATA(zvkg, RISCV_ISA_EXT_ZVKG),
 	__RISCV_ISA_EXT_DATA(zvkn, RISCV_ISA_EXT_ZVKN),