[v3,5/6] dmaengine: dw-edma: HDMA: Add sync read before starting the DMA transfer in remote setup
Message ID | 20231011-b4-feature_hdma_mainline-v3-5-24ee0c979c6f@bootlin.com |
---|---|
State | New |
Headers |
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[23.128.96.33]) by mx.google.com with ESMTPS id v13-20020a17090a088d00b0027491203b43si3764807pjc.189.2023.10.11.01.13.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Oct 2023 01:13:08 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) client-ip=23.128.96.33; Authentication-Results: mx.google.com; dkim=pass header.i=@bootlin.com header.s=gm1 header.b=ZAMMWcZI; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.33 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=bootlin.com Received: from out1.vger.email (depot.vger.email [IPv6:2620:137:e000::3:0]) by lipwig.vger.email (Postfix) with ESMTP id 217AF822919B; Wed, 11 Oct 2023 01:13:06 -0700 (PDT) X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.103.10 at lipwig.vger.email Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230402AbjJKIMz (ORCPT <rfc822;rua109.linux@gmail.com> + 19 others); Wed, 11 Oct 2023 04:12:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54884 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230253AbjJKIMn (ORCPT <rfc822;linux-kernel@vger.kernel.org>); Wed, 11 Oct 2023 04:12:43 -0400 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 610BCC4; Wed, 11 Oct 2023 01:12:37 -0700 (PDT) Received: by mail.gandi.net (Postfix) with ESMTPSA id 477A91BF20B; Wed, 11 Oct 2023 08:12:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1697011956; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=czWpdkchpjIcmkN5wE2Ao4sOST4MTB7arrN4NTSp2AY=; b=ZAMMWcZIv3fUK0YhnOY6IGV91gV13RwXR1jadOMLxKqrh96UtzvCyUR1Qr9RUKkdm84Ekj ogmgBZpcsht4rXjfbkjOVzWBmGYsBed15hgAOlzoXo9OvLDS+9hEOYWTVpdeDmK7UFn6Uz 4jMShL7Whh9qY04DzrIjj2wPqZS+DYjCGJ+PkIXcaotTpiWoNdQ38wSoFwlTlGnRv93aQ0 C12YRSDgaqsUo9u24oi/1Rv37dhG2BDsvIV/GaU9jbz0aGqlOMnwRqcqJnP+61d8NyTglv jeYDppQ7/rnxsnc4MWkteZwtRYVWOpJ3PraMrbgbbiG9U1BTGwDvJ8SzSWuJEQ== From: Kory Maincent <kory.maincent@bootlin.com> Date: Wed, 11 Oct 2023 10:11:44 +0200 Subject: [PATCH v3 5/6] dmaengine: dw-edma: HDMA: Add sync read before starting the DMA transfer in remote setup MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20231011-b4-feature_hdma_mainline-v3-5-24ee0c979c6f@bootlin.com> References: <20231011-b4-feature_hdma_mainline-v3-0-24ee0c979c6f@bootlin.com> In-Reply-To: <20231011-b4-feature_hdma_mainline-v3-0-24ee0c979c6f@bootlin.com> To: Manivannan Sadhasivam <mani@kernel.org>, Gustavo Pimentel <gustavo.pimentel@synopsys.com>, Serge Semin <fancer.lancer@gmail.com>, Vinod Koul <vkoul@kernel.org>, Cai Huoqing <cai.huoqing@linux.dev> Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>, dmaengine@vger.kernel.org, linux-kernel@vger.kernel.org, Herve Codina <herve.codina@bootlin.com>, Kory Maincent <kory.maincent@bootlin.com> X-Mailer: b4 0.12.3 X-GND-Sasl: kory.maincent@bootlin.com X-Spam-Status: No, score=2.7 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, RCVD_IN_SBL_CSS,SPF_HELO_NONE,SPF_PASS autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lipwig.vger.email Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (lipwig.vger.email [0.0.0.0]); Wed, 11 Oct 2023 01:13:06 -0700 (PDT) X-Spam-Level: ** X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779446042585653150 X-GMAIL-MSGID: 1779446042585653150 |
Series |
Fix support of dw-edma HDMA NATIVE IP in remote setup
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Commit Message
Köry Maincent
Oct. 11, 2023, 8:11 a.m. UTC
The Linked list element and pointer are not stored in the same memory as
the HDMA controller register. If the doorbell register is toggled before
the full write of the linked list a race condition error can appears.
In remote setup we can only use a readl to the memory to assured the full
write has occurred.
Fixes: e74c39573d35 ("dmaengine: dw-edma: Add support for native HDMA")
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
---
Changes in v2:
- Move the sync read in a function.
- Add commments
---
drivers/dma/dw-edma/dw-hdma-v0-core.c | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
Comments
On Wed, Oct 11, 2023 at 10:11:44AM +0200, Kory Maincent wrote: > The Linked list element and pointer are not stored in the same memory as > the HDMA controller register. If the doorbell register is toggled before > the full write of the linked list a race condition error can appears. s/can appears/may occur > In remote setup we can only use a readl to the memory to assured the full > write has occurred. s/assured/assure > > Fixes: e74c39573d35 ("dmaengine: dw-edma: Add support for native HDMA") > Signed-off-by: Kory Maincent <kory.maincent@bootlin.com> Reviewed-by: Serge Semin <fancer.lancer@gmail.com> -Serge(y) > --- > > Changes in v2: > - Move the sync read in a function. > - Add commments > --- > drivers/dma/dw-edma/dw-hdma-v0-core.c | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > > diff --git a/drivers/dma/dw-edma/dw-hdma-v0-core.c b/drivers/dma/dw-edma/dw-hdma-v0-core.c > index 04b0bcb6ded9..13b6aec6a6de 100644 > --- a/drivers/dma/dw-edma/dw-hdma-v0-core.c > +++ b/drivers/dma/dw-edma/dw-hdma-v0-core.c > @@ -222,6 +222,20 @@ static void dw_hdma_v0_core_write_chunk(struct dw_edma_chunk *chunk) > dw_hdma_v0_write_ll_link(chunk, i, control, chunk->ll_region.paddr); > } > > +static void dw_hdma_v0_sync_ll_data(struct dw_edma_chunk *chunk) > +{ > + /* > + * In case of remote HDMA engine setup, the DW PCIe RP/EP internals > + * configuration registers and Application memory are normally accessed > + * over different buses. Ensure LL-data reaches the memory before the > + * doorbell register is toggled by issuing the dummy-read from the remote > + * LL memory in a hope that the posted MRd TLP will return only after the > + * last MWr TLP is completed > + */ > + if (!(chunk->chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL)) > + readl(chunk->ll_region.vaddr.io); > +} > + > static void dw_hdma_v0_core_start(struct dw_edma_chunk *chunk, bool first) > { > struct dw_edma_chan *chan = chunk->chan; > @@ -252,6 +266,9 @@ static void dw_hdma_v0_core_start(struct dw_edma_chunk *chunk, bool first) > /* Set consumer cycle */ > SET_CH_32(dw, chan->dir, chan->id, cycle_sync, > HDMA_V0_CONSUMER_CYCLE_STAT | HDMA_V0_CONSUMER_CYCLE_BIT); > + > + dw_hdma_v0_sync_ll_data(chunk); > + > /* Doorbell */ > SET_CH_32(dw, chan->dir, chan->id, doorbell, HDMA_V0_DOORBELL_START); > } > > -- > 2.25.1 >
On Wed, Oct 11, 2023 at 01:47:49PM +0300, Serge Semin wrote: > On Wed, Oct 11, 2023 at 10:11:44AM +0200, Kory Maincent wrote: > > The Linked list element and pointer are not stored in the same memory as > > the HDMA controller register. If the doorbell register is toggled before > > the full write of the linked list a race condition error can appears. > > s/can appears/may occur It should have been: s/can appears/will occur -Serge(y) > > > In remote setup we can only use a readl to the memory to assured the full > > write has occurred. > > s/assured/assure > > > > > Fixes: e74c39573d35 ("dmaengine: dw-edma: Add support for native HDMA") > > Signed-off-by: Kory Maincent <kory.maincent@bootlin.com> > > Reviewed-by: Serge Semin <fancer.lancer@gmail.com> > > -Serge(y) > > > --- > > > > Changes in v2: > > - Move the sync read in a function. > > - Add commments > > --- > > drivers/dma/dw-edma/dw-hdma-v0-core.c | 17 +++++++++++++++++ > > 1 file changed, 17 insertions(+) > > > > diff --git a/drivers/dma/dw-edma/dw-hdma-v0-core.c b/drivers/dma/dw-edma/dw-hdma-v0-core.c > > index 04b0bcb6ded9..13b6aec6a6de 100644 > > --- a/drivers/dma/dw-edma/dw-hdma-v0-core.c > > +++ b/drivers/dma/dw-edma/dw-hdma-v0-core.c > > @@ -222,6 +222,20 @@ static void dw_hdma_v0_core_write_chunk(struct dw_edma_chunk *chunk) > > dw_hdma_v0_write_ll_link(chunk, i, control, chunk->ll_region.paddr); > > } > > > > +static void dw_hdma_v0_sync_ll_data(struct dw_edma_chunk *chunk) > > +{ > > + /* > > + * In case of remote HDMA engine setup, the DW PCIe RP/EP internals > > + * configuration registers and Application memory are normally accessed > > + * over different buses. Ensure LL-data reaches the memory before the > > + * doorbell register is toggled by issuing the dummy-read from the remote > > + * LL memory in a hope that the posted MRd TLP will return only after the > > + * last MWr TLP is completed > > + */ > > + if (!(chunk->chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL)) > > + readl(chunk->ll_region.vaddr.io); > > +} > > + > > static void dw_hdma_v0_core_start(struct dw_edma_chunk *chunk, bool first) > > { > > struct dw_edma_chan *chan = chunk->chan; > > @@ -252,6 +266,9 @@ static void dw_hdma_v0_core_start(struct dw_edma_chunk *chunk, bool first) > > /* Set consumer cycle */ > > SET_CH_32(dw, chan->dir, chan->id, cycle_sync, > > HDMA_V0_CONSUMER_CYCLE_STAT | HDMA_V0_CONSUMER_CYCLE_BIT); > > + > > + dw_hdma_v0_sync_ll_data(chunk); > > + > > /* Doorbell */ > > SET_CH_32(dw, chan->dir, chan->id, doorbell, HDMA_V0_DOORBELL_START); > > } > > > > -- > > 2.25.1 > >
diff --git a/drivers/dma/dw-edma/dw-hdma-v0-core.c b/drivers/dma/dw-edma/dw-hdma-v0-core.c index 04b0bcb6ded9..13b6aec6a6de 100644 --- a/drivers/dma/dw-edma/dw-hdma-v0-core.c +++ b/drivers/dma/dw-edma/dw-hdma-v0-core.c @@ -222,6 +222,20 @@ static void dw_hdma_v0_core_write_chunk(struct dw_edma_chunk *chunk) dw_hdma_v0_write_ll_link(chunk, i, control, chunk->ll_region.paddr); } +static void dw_hdma_v0_sync_ll_data(struct dw_edma_chunk *chunk) +{ + /* + * In case of remote HDMA engine setup, the DW PCIe RP/EP internals + * configuration registers and Application memory are normally accessed + * over different buses. Ensure LL-data reaches the memory before the + * doorbell register is toggled by issuing the dummy-read from the remote + * LL memory in a hope that the posted MRd TLP will return only after the + * last MWr TLP is completed + */ + if (!(chunk->chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL)) + readl(chunk->ll_region.vaddr.io); +} + static void dw_hdma_v0_core_start(struct dw_edma_chunk *chunk, bool first) { struct dw_edma_chan *chan = chunk->chan; @@ -252,6 +266,9 @@ static void dw_hdma_v0_core_start(struct dw_edma_chunk *chunk, bool first) /* Set consumer cycle */ SET_CH_32(dw, chan->dir, chan->id, cycle_sync, HDMA_V0_CONSUMER_CYCLE_STAT | HDMA_V0_CONSUMER_CYCLE_BIT); + + dw_hdma_v0_sync_ll_data(chunk); + /* Doorbell */ SET_CH_32(dw, chan->dir, chan->id, doorbell, HDMA_V0_DOORBELL_START); }