Message ID | 20231010132701.1658737-2-claudiu.beznea.uj@bp.renesas.com |
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State | New |
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([82.78.167.152]) by smtp.gmail.com with ESMTPSA id i16-20020a1709064ed000b0099bd0b5a2bcsm8526578ejv.101.2023.10.10.06.27.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Oct 2023 06:27:10 -0700 (PDT) From: Claudiu <claudiu.beznea@tuxon.dev> X-Google-Original-From: Claudiu <claudiu.beznea.uj@bp.renesas.com> To: geert+renesas@glider.be, magnus.damm@gmail.com, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org Cc: linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org, Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Subject: [PATCH 1/6] clk: renesas: rzg2l: Use %x format specifier to print CLK_ON_R() Date: Tue, 10 Oct 2023 16:26:56 +0300 Message-Id: <20231010132701.1658737-2-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231010132701.1658737-1-claudiu.beznea.uj@bp.renesas.com> References: <20231010132701.1658737-1-claudiu.beznea.uj@bp.renesas.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=2.7 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, RCVD_IN_SBL_CSS,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on agentk.vger.email Precedence: bulk List-ID: <linux-kernel.vger.kernel.org> X-Mailing-List: linux-kernel@vger.kernel.org X-Greylist: Sender passed SPF test, not delayed by milter-greylist-4.6.4 (agentk.vger.email [0.0.0.0]); Tue, 10 Oct 2023 06:27:26 -0700 (PDT) X-Spam-Level: ** X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779375223914075762 X-GMAIL-MSGID: 1779375223914075762 |
Series |
arm64: dts: renesas: Add SDHI1 and SDHI2 for RZ/G3S
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Commit Message
claudiu beznea
Oct. 10, 2023, 1:26 p.m. UTC
From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Use %x format specifier to print CLK_ON_R(). This is easier when debugging as the value printed will be hexadecimal like in the hardware manual. Along with it "0x" has been added in front of the printed value. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> --- drivers/clk/renesas/rzg2l-cpg.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
Comments
Hello! On 10/10/23 4:26 PM, Claudiu wrote: > From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > > Use %x format specifier to print CLK_ON_R(). This is easier when > debugging as the value printed will be hexadecimal like in the hardware > manual. Along with it "0x" has been added in front of the printed value. > > Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > --- > drivers/clk/renesas/rzg2l-cpg.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c > index d62f1bc1f60e..764bd72cf059 100644 > --- a/drivers/clk/renesas/rzg2l-cpg.c > +++ b/drivers/clk/renesas/rzg2l-cpg.c > @@ -1213,7 +1213,7 @@ static int rzg2l_mod_clock_endisable(struct clk_hw *hw, bool enable) > return 0; > } > > - dev_dbg(dev, "CLK_ON %u/%pC %s\n", CLK_ON_R(reg), hw->clk, > + dev_dbg(dev, "CLK_ON 0x%x/%pC %s\n", CLK_ON_R(reg), hw->clk, Perhaps "%#x" instead of "0x%x"? [...] MBR, Sergey
Hi, Sergei, On 10.10.2023 17:52, Sergei Shtylyov wrote: > Hello! > > On 10/10/23 4:26 PM, Claudiu wrote: > >> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> >> >> Use %x format specifier to print CLK_ON_R(). This is easier when >> debugging as the value printed will be hexadecimal like in the hardware >> manual. Along with it "0x" has been added in front of the printed value. >> >> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> >> --- >> drivers/clk/renesas/rzg2l-cpg.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c >> index d62f1bc1f60e..764bd72cf059 100644 >> --- a/drivers/clk/renesas/rzg2l-cpg.c >> +++ b/drivers/clk/renesas/rzg2l-cpg.c >> @@ -1213,7 +1213,7 @@ static int rzg2l_mod_clock_endisable(struct clk_hw *hw, bool enable) >> return 0; >> } >> >> - dev_dbg(dev, "CLK_ON %u/%pC %s\n", CLK_ON_R(reg), hw->clk, >> + dev_dbg(dev, "CLK_ON 0x%x/%pC %s\n", CLK_ON_R(reg), hw->clk, > > Perhaps "%#x" instead of "0x%x"? Yes, better, thanks! > > [...] > > MBR, Sergey
Hi Claudiu, On Wed, Oct 11, 2023 at 9:37 AM claudiu beznea <claudiu.beznea@tuxon.dev> wrote: > On 10.10.2023 17:52, Sergei Shtylyov wrote: > > On 10/10/23 4:26 PM, Claudiu wrote: > >> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > >> > >> Use %x format specifier to print CLK_ON_R(). This is easier when > >> debugging as the value printed will be hexadecimal like in the hardware > >> manual. Along with it "0x" has been added in front of the printed value. > >> > >> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > >> --- > >> drivers/clk/renesas/rzg2l-cpg.c | 2 +- > >> 1 file changed, 1 insertion(+), 1 deletion(-) > >> > >> diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c > >> index d62f1bc1f60e..764bd72cf059 100644 > >> --- a/drivers/clk/renesas/rzg2l-cpg.c > >> +++ b/drivers/clk/renesas/rzg2l-cpg.c > >> @@ -1213,7 +1213,7 @@ static int rzg2l_mod_clock_endisable(struct clk_hw *hw, bool enable) > >> return 0; > >> } > >> > >> - dev_dbg(dev, "CLK_ON %u/%pC %s\n", CLK_ON_R(reg), hw->clk, > >> + dev_dbg(dev, "CLK_ON 0x%x/%pC %s\n", CLK_ON_R(reg), hw->clk, > > > > Perhaps "%#x" instead of "0x%x"? > > Yes, better, thanks! "%#" is not very common in drivers/clk/. And to me it always raises the question: What does "alternate form" mean for this conversion specifier and this implementation of vsnprintf()? Gr{oetje,eeting}s, Geert
Hi, Geert, On 11.10.2023 10:43, Geert Uytterhoeven wrote: > Hi Claudiu, > > On Wed, Oct 11, 2023 at 9:37 AM claudiu beznea <claudiu.beznea@tuxon.dev> wrote: >> On 10.10.2023 17:52, Sergei Shtylyov wrote: >>> On 10/10/23 4:26 PM, Claudiu wrote: >>>> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> >>>> >>>> Use %x format specifier to print CLK_ON_R(). This is easier when >>>> debugging as the value printed will be hexadecimal like in the hardware >>>> manual. Along with it "0x" has been added in front of the printed value. >>>> >>>> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> >>>> --- >>>> drivers/clk/renesas/rzg2l-cpg.c | 2 +- >>>> 1 file changed, 1 insertion(+), 1 deletion(-) >>>> >>>> diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c >>>> index d62f1bc1f60e..764bd72cf059 100644 >>>> --- a/drivers/clk/renesas/rzg2l-cpg.c >>>> +++ b/drivers/clk/renesas/rzg2l-cpg.c >>>> @@ -1213,7 +1213,7 @@ static int rzg2l_mod_clock_endisable(struct clk_hw *hw, bool enable) >>>> return 0; >>>> } >>>> >>>> - dev_dbg(dev, "CLK_ON %u/%pC %s\n", CLK_ON_R(reg), hw->clk, >>>> + dev_dbg(dev, "CLK_ON 0x%x/%pC %s\n", CLK_ON_R(reg), hw->clk, >>> >>> Perhaps "%#x" instead of "0x%x"? >> >> Yes, better, thanks! > > "%#" is not very common in drivers/clk/. > > And to me it always raises the question: What does "alternate form" mean > for this conversion specifier and this implementation of vsnprintf()? OK, I have no strong opinion on this. Please let me know in case you need me to send a new version. Thank you, Claudiu Beznea > > Gr{oetje,eeting}s, > > Geert >
On Tue, Oct 10, 2023 at 3:27 PM Claudiu <claudiu.beznea@tuxon.dev> wrote: > From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > > Use %x format specifier to print CLK_ON_R(). This is easier when > debugging as the value printed will be hexadecimal like in the hardware > manual. Along with it "0x" has been added in front of the printed value. > > Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-clk-for-v6.7. Gr{oetje,eeting}s, Geert
diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c index d62f1bc1f60e..764bd72cf059 100644 --- a/drivers/clk/renesas/rzg2l-cpg.c +++ b/drivers/clk/renesas/rzg2l-cpg.c @@ -1213,7 +1213,7 @@ static int rzg2l_mod_clock_endisable(struct clk_hw *hw, bool enable) return 0; } - dev_dbg(dev, "CLK_ON %u/%pC %s\n", CLK_ON_R(reg), hw->clk, + dev_dbg(dev, "CLK_ON 0x%x/%pC %s\n", CLK_ON_R(reg), hw->clk, enable ? "ON" : "OFF"); value = bitmask << 16;