[v2,2/7] thermal: int340x: processor_thermal: Common function to clear SOC interrupt

Message ID 20231009190538.2488792-3-srinivas.pandruvada@linux.intel.com
State New
Headers
Series thermal: processor_thermal: Power floor status |

Commit Message

srinivas pandruvada Oct. 9, 2023, 7:05 p.m. UTC
  The SOC interrupt status register contains multiple interrupt sources
(workload hint interrupt and power floor interrupt). This is not possible
to clear individual interrupt source with read-modify-write, as it may
clear the new interrupt from the firmware after read operation. This is
also not possible to set the interrupt status bit to 1 for the other
interrupt source, which is not part of clearing.

Hence create a common function, which does clear all status bits at once.
Call this function after processing all interrupt sources.

Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
---
v2:
- New patch in the series

 .../int340x_thermal/processor_thermal_device.h      |  1 +
 .../int340x_thermal/processor_thermal_device_pci.c  | 13 +++++++++++++
 .../int340x_thermal/processor_thermal_wt_hint.c     |  2 --
 3 files changed, 14 insertions(+), 2 deletions(-)
  

Patch

diff --git a/drivers/thermal/intel/int340x_thermal/processor_thermal_device.h b/drivers/thermal/intel/int340x_thermal/processor_thermal_device.h
index 8ed6e8e94c8a..f9a381b3e55c 100644
--- a/drivers/thermal/intel/int340x_thermal/processor_thermal_device.h
+++ b/drivers/thermal/intel/int340x_thermal/processor_thermal_device.h
@@ -92,6 +92,7 @@  void proc_thermal_wt_req_remove(struct pci_dev *pdev);
 #define MBOX_DATA_BIT_VALID		31
 
 #define SOC_WT_RES_INT_STATUS_OFFSET	0x5B18
+#define SOC_WT_RES_INT_STATUS_MASK	GENMASK_ULL(3, 2)
 
 int processor_thermal_send_mbox_read_cmd(struct pci_dev *pdev, u16 id, u64 *resp);
 int processor_thermal_send_mbox_write_cmd(struct pci_dev *pdev, u16 id, u32 data);
diff --git a/drivers/thermal/intel/int340x_thermal/processor_thermal_device_pci.c b/drivers/thermal/intel/int340x_thermal/processor_thermal_device_pci.c
index 3c5ced79ead0..d353a190ce44 100644
--- a/drivers/thermal/intel/int340x_thermal/processor_thermal_device_pci.c
+++ b/drivers/thermal/intel/int340x_thermal/processor_thermal_device_pci.c
@@ -122,11 +122,24 @@  static void pkg_thermal_schedule_work(struct delayed_work *work)
 	schedule_delayed_work(work, ms);
 }
 
+static void proc_thermal_clear_soc_int_status(struct proc_thermal_device *proc_priv)
+{
+	u64 status;
+
+	if (!(proc_priv->mmio_feature_mask & PROC_THERMAL_FEATURE_WT_HINT))
+		return;
+
+	status = readq(proc_priv->mmio_base + SOC_WT_RES_INT_STATUS_OFFSET);
+	writeq(status & ~SOC_WT_RES_INT_STATUS_MASK,
+	       proc_priv->mmio_base + SOC_WT_RES_INT_STATUS_OFFSET);
+}
+
 static irqreturn_t proc_thermal_irq_thread_handler(int irq, void *devid)
 {
 	struct proc_thermal_pci *pci_info = devid;
 
 	proc_thermal_wt_intr_callback(pci_info->pdev, pci_info->proc_priv);
+	proc_thermal_clear_soc_int_status(pci_info->proc_priv);
 
 	return IRQ_HANDLED;
 }
diff --git a/drivers/thermal/intel/int340x_thermal/processor_thermal_wt_hint.c b/drivers/thermal/intel/int340x_thermal/processor_thermal_wt_hint.c
index c08838eb10c8..9d5e4c169d1b 100644
--- a/drivers/thermal/intel/int340x_thermal/processor_thermal_wt_hint.c
+++ b/drivers/thermal/intel/int340x_thermal/processor_thermal_wt_hint.c
@@ -215,8 +215,6 @@  void proc_thermal_wt_intr_callback(struct pci_dev *pdev, struct proc_thermal_dev
 	if (!(status & SOC_WT_PREDICTION_INT_ACTIVE))
 		return;
 
-	writeq(status & ~SOC_WT_PREDICTION_INT_ACTIVE,
-		       proc_priv->mmio_base + SOC_WT_RES_INT_STATUS_OFFSET);
 	sysfs_notify(&pdev->dev.kobj, "workload_hint", "workload_type_index");
 }
 EXPORT_SYMBOL_NS_GPL(proc_thermal_wt_intr_callback, INT340X_THERMAL);