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Mon, 9 Oct 2023 10:39:01 -0700 Received: from drhqmail203.nvidia.com (10.126.190.182) by drhqmail202.nvidia.com (10.126.190.181) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.41; Mon, 9 Oct 2023 10:39:01 -0700 Received: from 717d7c0-lcedt.nvidia.com (10.127.8.12) by mail.nvidia.com (10.126.190.182) with Microsoft SMTP Server id 15.2.986.41 via Frontend Transport; Mon, 9 Oct 2023 10:39:01 -0700 From: Dipen Patel To: , , , , , , , CC: Dipen Patel Subject: [PATCH 1/1] gpio: tegra186: Set fwnode of the GPIO chip Date: Mon, 9 Oct 2023 10:38:58 -0700 Message-ID: <20231009173858.723686-1-dipenp@nvidia.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-NVConfidentiality: public X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000E9D4:EE_|SN7PR12MB8003:EE_ X-MS-Office365-Filtering-Correlation-Id: 2a701d62-346d-4056-1e70-08dbc8eea675 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Mon, 09 Oct 2023 10:39:30 -0700 (PDT) X-Spam-Level: ** X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1779300484116654987 X-GMAIL-MSGID: 1779300484116654987 Any driver that depends on the GPIO match function to locate the GPIO controller, it has to use the fwnode from the gpio_chip structure. But with [1], it is GPIO providers job to set any members of the gpio_chip structure. This patch addresses that. [1] https://git.kernel.org/pub/scm/linux/kernel/git/pateldipen1984/linux.git/patch/drivers/gpio/gpiolib.c?id=daecca4b8433d47f0db4933bcc0f283d530ba22e Signed-off-by: Dipen Patel Reviewed-by: Andy Shevchenko --- drivers/gpio/gpio-tegra186.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpio/gpio-tegra186.c b/drivers/gpio/gpio-tegra186.c index d87dd06db40d..86ad34e07841 100644 --- a/drivers/gpio/gpio-tegra186.c +++ b/drivers/gpio/gpio-tegra186.c @@ -989,6 +989,12 @@ static int tegra186_gpio_probe(struct platform_device *pdev) offset += port->pins; } + /* + * This is needed for driver using gpio device matching where it + * has to use gpio_chip fwnode to match the gpio controller. + */ + gpio->gpio.fwnode = of_node_to_fwnode(pdev->dev.of_node); + return devm_gpiochip_add_data(&pdev->dev, &gpio->gpio, gpio); }