Message ID | 20231009100557.18224-3-sumitg@nvidia.com |
---|---|
State | New |
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Mon, 9 Oct 2023 03:06:13 -0700 From: Sumit Gupta <sumitg@nvidia.com> To: <treding@nvidia.com>, <jonathanh@nvidia.com>, <krzysztof.kozlowski@linaro.org>, <linux-tegra@vger.kernel.org>, <linux-kernel@vger.kernel.org> CC: <bbasu@nvidia.com>, <sumitg@nvidia.com> Subject: [Patch v2 2/2] memory: tegra: set BPMP msg flags to reset IPC channels Date: Mon, 9 Oct 2023 15:35:57 +0530 Message-ID: <20231009100557.18224-3-sumitg@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20231009100557.18224-1-sumitg@nvidia.com> References: <20231009100557.18224-1-sumitg@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Content-Type: text/plain X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000044F7:EE_|MN0PR12MB5929:EE_ X-MS-Office365-Filtering-Correlation-Id: 84942fa8-638c-448b-6dcd-08dbc8af65c5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: ynyQB67M/lQi3wNOZKkVNfoqNFUaSZsDgfFm64/yxObyqzOSUcHH3EEcIQ+He/m03UIitM5opb5l3Rais2zxkAvjVVAR4Ft1DgCBeW6J9RAqEGmOJMz+NR9tZKxKUTdGGwgvVO1Wh2eLe77MIC0sLQlf72ax2W3GNcRJJbsfkO7UDe72NnORm56q41lwAa1AMvplCgUT1DNY9mNaTMfepuyw08G2tkZs6VpzlGMzAyxgYEpKg/ryMpfLDYEDc+sds1LpH+ciVMS+cJZjHZjhlWXyvLSvV2mo0NMgiGY6oj8mXz4eTlalkFuddIZVpq5L++WsesNTLoo7DQND5iirzLCu8NFrOq7mPIlU0F8Vm+KBEVae99tD/VXzyF7Vzxv4Mxo6UysKIws1eipvaSQXPaUwNqXSU+hSPSPa7NDQMfrQR0OGrZgMvfncRE/lxiQU597TW60HG9Ty5Dd1BpfdlgIcnKh0h2Yazj7i7sBhUki+Ymp3Hg9hT7paF5lfauHaEhvorC8AAs3FjAY6dS9GsxScRAk6OdDzPZFZxIWEty/s1EK80GvujNjhywBmKuM8J1PN2mGW6UVv9wdl7FKwikoq3SWQy2/uNaI/fIuljULT3GUsZHx9kOmPsJDFHZdNDxk24RtRwMPoAYc+4FkgmlrLXhmcWP28jTzk0DX7AQtCrXCsUnVsB+X9bVjNcFPGyP01WKXUMXPptTw6FdMQZREQuCpRSiij8OMmM289In/UuWTS/vIdnNQevbKO8nbH X-Forefront-Antispam-Report: CIP:216.228.118.232;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge1.nvidia.com;CAT:NONE;SFS:(13230031)(4636009)(39860400002)(376002)(396003)(136003)(346002)(230922051799003)(451199024)(186009)(64100799003)(1800799009)(82310400011)(46966006)(36840700001)(40470700004)(40480700001)(40460700003)(83380400001)(1076003)(107886003)(2616005)(336012)(426003)(26005)(47076005)(316002)(36860700001)(110136005)(54906003)(70206006)(70586007)(8936002)(8676002)(4326008)(5660300002)(41300700001)(7696005)(6666004)(2906002)(82740400003)(478600001)(36756003)(356005)(7636003)(86362001);DIR:OUT;SFP:1101; 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Fix hang due to CPU BW request as BPMP suspended
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Commit Message
Sumit Gupta
Oct. 9, 2023, 10:05 a.m. UTC
From: Thierry Reding <treding@nvidia.com> Set the 'TEGRA_BPMP_MESSAGE_RESET' bit in newly added 'flags' field of 'struct tegra_bpmp_message' to request for the reset of BPMP IPC channels. This is used along with the 'suspended' check in BPMP driver for handling early bandwidth requests due to the hotplug of CPU's during system resume before the driver gets resumed. Fixes: f41e1442ac5b ("cpufreq: tegra194: add OPP support and set bandwidth") Signed-off-by: Thierry Reding <treding@nvidia.com> Co-developed-by: Sumit Gupta <sumitg@nvidia.com> Signed-off-by: Sumit Gupta <sumitg@nvidia.com> --- drivers/memory/tegra/tegra234.c | 4 ++++ 1 file changed, 4 insertions(+)
Comments
On Mon, Oct 09, 2023 at 03:35:57PM +0530, Sumit Gupta wrote: > From: Thierry Reding <treding@nvidia.com> > > Set the 'TEGRA_BPMP_MESSAGE_RESET' bit in newly added 'flags' field > of 'struct tegra_bpmp_message' to request for the reset of BPMP IPC > channels. This is used along with the 'suspended' check in BPMP driver > for handling early bandwidth requests due to the hotplug of CPU's > during system resume before the driver gets resumed. > > Fixes: f41e1442ac5b ("cpufreq: tegra194: add OPP support and set bandwidth") > Signed-off-by: Thierry Reding <treding@nvidia.com> > Co-developed-by: Sumit Gupta <sumitg@nvidia.com> > Signed-off-by: Sumit Gupta <sumitg@nvidia.com> > --- > drivers/memory/tegra/tegra234.c | 4 ++++ > 1 file changed, 4 insertions(+) Krzysztof, this one has a build-time dependency on patch 1/2, so it'd make sense for me to pick this up into the Tegra tree along with patch 1/2. That is slightly easier because I already have a BPMP patch in the tree. There should be no conflict between this and the Tegra tree, though, so if you feel strongly about it, you could also pick up both patches, in which case: Acked-by: Thierry Reding <treding@nvidia.com> > > diff --git a/drivers/memory/tegra/tegra234.c b/drivers/memory/tegra/tegra234.c > index 9e5b5dbd9c8d..2845041f32d6 100644 > --- a/drivers/memory/tegra/tegra234.c > +++ b/drivers/memory/tegra/tegra234.c > @@ -986,6 +986,10 @@ static int tegra234_mc_icc_set(struct icc_node *src, struct icc_node *dst) > msg.rx.data = &bwmgr_resp; > msg.rx.size = sizeof(bwmgr_resp); > > + if (pclient->bpmp_id >= TEGRA_ICC_BPMP_CPU_CLUSTER0 && > + pclient->bpmp_id <= TEGRA_ICC_BPMP_CPU_CLUSTER2) > + msg.flags = TEGRA_BPMP_MESSAGE_RESET; > + > ret = tegra_bpmp_transfer(mc->bpmp, &msg); > if (ret < 0) { > dev_err(mc->dev, "BPMP transfer failed: %d\n", ret); > -- > 2.17.1 >
On 09/10/2023 12:05, Sumit Gupta wrote: > From: Thierry Reding <treding@nvidia.com> > > Set the 'TEGRA_BPMP_MESSAGE_RESET' bit in newly added 'flags' field > of 'struct tegra_bpmp_message' to request for the reset of BPMP IPC > channels. This is used along with the 'suspended' check in BPMP driver > for handling early bandwidth requests due to the hotplug of CPU's > during system resume before the driver gets resumed. > > Fixes: f41e1442ac5b ("cpufreq: tegra194: add OPP support and set bandwidth") > Signed-off-by: Thierry Reding <treding@nvidia.com> > Co-developed-by: Sumit Gupta <sumitg@nvidia.com> > Signed-off-by: Sumit Gupta <sumitg@nvidia.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
On 12/10/2023 13:00, Thierry Reding wrote: > On Mon, Oct 09, 2023 at 03:35:57PM +0530, Sumit Gupta wrote: >> From: Thierry Reding <treding@nvidia.com> >> >> Set the 'TEGRA_BPMP_MESSAGE_RESET' bit in newly added 'flags' field >> of 'struct tegra_bpmp_message' to request for the reset of BPMP IPC >> channels. This is used along with the 'suspended' check in BPMP driver >> for handling early bandwidth requests due to the hotplug of CPU's >> during system resume before the driver gets resumed. >> >> Fixes: f41e1442ac5b ("cpufreq: tegra194: add OPP support and set bandwidth") >> Signed-off-by: Thierry Reding <treding@nvidia.com> >> Co-developed-by: Sumit Gupta <sumitg@nvidia.com> >> Signed-off-by: Sumit Gupta <sumitg@nvidia.com> >> --- >> drivers/memory/tegra/tegra234.c | 4 ++++ >> 1 file changed, 4 insertions(+) > > Krzysztof, > > this one has a build-time dependency on patch 1/2, so it'd make sense > for me to pick this up into the Tegra tree along with patch 1/2. That > is slightly easier because I already have a BPMP patch in the tree. Sounds good. Best regards, Krzysztof
diff --git a/drivers/memory/tegra/tegra234.c b/drivers/memory/tegra/tegra234.c index 9e5b5dbd9c8d..2845041f32d6 100644 --- a/drivers/memory/tegra/tegra234.c +++ b/drivers/memory/tegra/tegra234.c @@ -986,6 +986,10 @@ static int tegra234_mc_icc_set(struct icc_node *src, struct icc_node *dst) msg.rx.data = &bwmgr_resp; msg.rx.size = sizeof(bwmgr_resp); + if (pclient->bpmp_id >= TEGRA_ICC_BPMP_CPU_CLUSTER0 && + pclient->bpmp_id <= TEGRA_ICC_BPMP_CPU_CLUSTER2) + msg.flags = TEGRA_BPMP_MESSAGE_RESET; + ret = tegra_bpmp_transfer(mc->bpmp, &msg); if (ret < 0) { dev_err(mc->dev, "BPMP transfer failed: %d\n", ret);