| Message ID | 20231005164051.984254-3-thippeswamy.havalige@amd.com |
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From: Thippeswamy Havalige <thippeswamy.havalige@amd.com>
To: <linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>
CC: <lpieralisi@kernel.org>, <kw@linux.com>, <robh@kernel.org>,
<bhelgaas@google.com>, <krzysztof.kozlowski+dt@linaro.org>,
<conor+dt@kernel.org>, <michal.simek@amd.com>,
<bharat.kumar.gogada@amd.com>,
Thippeswamy Havalige <thippeswamy.havalige@amd.com>
Subject: [PATCH v5 RESEND 2/4] dt-bindings: PCI: xilinx-nwl: Modify ECAM size
in example
Date: Thu, 5 Oct 2023 22:10:49 +0530
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ncrease ecam size value to discover 256 buses during
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Commit Message
Havalige, Thippeswamy
Oct. 5, 2023, 4:40 p.m. UTC
Update ECAM size in example to discover up to 256 buses. Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com> Acked-by: Rob Herring <robh@kernel.org> --- changes in v5: None changes in v4: None changes in v3: Remove period at end of subject line changes in v2: None. changes in v1: None. --- Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml b/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml index 897602559b37..426f90a47f35 100644 --- a/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/xlnx,nwl-pcie.yaml @@ -118,7 +118,7 @@ examples: compatible = "xlnx,nwl-pcie-2.11"; reg = <0x0 0xfd0e0000 0x0 0x1000>, <0x0 0xfd480000 0x0 0x1000>, - <0x80 0x00000000 0x0 0x1000000>; + <0x80 0x00000000 0x0 0x10000000>; reg-names = "breg", "pcireg", "cfg"; ranges = <0x02000000 0x0 0xe0000000 0x0 0xe0000000 0x0 0x10000000>, <0x43000000 0x00000006 0x0 0x00000006 0x0 0x00000002 0x0>;