Message ID | 20231004090449.256229-5-quic_devipriy@quicinc.com |
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Wed, 04 Oct 2023 09:05:31 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 39495Vcd031256 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 4 Oct 2023 09:05:31 GMT Received: from hu-devipriy-blr.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.36; Wed, 4 Oct 2023 02:05:25 -0700 From: Devi Priya <quic_devipriy@quicinc.com> To: <agross@kernel.org>, <andersson@kernel.org>, <konrad.dybcio@linaro.org>, <lee@kernel.org>, <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>, <conor+dt@kernel.org>, <thierry.reding@gmail.com>, <ndesaulniers@google.com>, <trix@redhat.com>, <baruch@tkos.co.il>, <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <llvm@lists.linux.dev> Subject: [PATCH V13 4/4] arm64: dts: ipq6018: add pwm node Date: Wed, 4 Oct 2023 14:34:49 +0530 Message-ID: <20231004090449.256229-5-quic_devipriy@quicinc.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231004090449.256229-1-quic_devipriy@quicinc.com> References: <20231004090449.256229-1-quic_devipriy@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain; 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Series | Add PWM support for IPQ chipsets | |
Commit Message
Devi Priya
Oct. 4, 2023, 9:04 a.m. UTC
Describe the PWM block on IPQ6018. The PWM is in the TCSR area. Make &tcsr "simple-mfd" compatible, and add &pwm as child of &tcsr. Add also ipq6018 specific compatible string. Co-developed-by: Baruch Siach <baruch.siach@siklu.com> Signed-off-by: Baruch Siach <baruch.siach@siklu.com> Signed-off-by: Devi Priya <quic_devipriy@quicinc.com> --- v13: No change v12: No change v11: No change v10: No change v9: Add 'ranges' property (Rob) v8: Add size cell to 'reg' (Rob) v7: Use 'reg' instead of 'offset' (Rob) Add qcom,tcsr-ipq6018 (Rob) Drop clock-names (Bjorn) v6: Make the PWM node child of TCSR (Rob Herring) Add assigned-clocks/assigned-clock-rates (Uwe Kleine-König) v5: Use qcom,pwm-regs for TCSR phandle instead of direct regs v3: s/qcom,pwm-ipq6018/qcom,ipq6018-pwm/ (Rob Herring) arch/arm64/boot/dts/qcom/ipq6018.dtsi | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-)
Comments
On 04/10/2023 11:04, Devi Priya wrote: > Describe the PWM block on IPQ6018. > > The PWM is in the TCSR area. Make &tcsr "simple-mfd" compatible, and add > &pwm as child of &tcsr. > ... > v3: s/qcom,pwm-ipq6018/qcom,ipq6018-pwm/ (Rob Herring) > > arch/arm64/boot/dts/qcom/ipq6018.dtsi | 15 ++++++++++++++- > 1 file changed, 14 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi > index e59b9df96c7e..429ad7cb681c 100644 > --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi > +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi > @@ -390,8 +390,21 @@ tcsr_mutex: hwlock@1905000 { > }; > > tcsr: syscon@1937000 { > - compatible = "qcom,tcsr-ipq6018", "syscon"; > + compatible = "qcom,tcsr-ipq6018", "syscon", "simple-mfd"; > reg = <0x0 0x01937000 0x0 0x21000>; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0x0 0x0 0x01937000 0x21000>; Please put ranges just after reg. With that: Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
On 10/4/2023 3:13 PM, Krzysztof Kozlowski wrote: > On 04/10/2023 11:04, Devi Priya wrote: >> Describe the PWM block on IPQ6018. >> >> The PWM is in the TCSR area. Make &tcsr "simple-mfd" compatible, and add >> &pwm as child of &tcsr. >> > > ... > >> v3: s/qcom,pwm-ipq6018/qcom,ipq6018-pwm/ (Rob Herring) >> >> arch/arm64/boot/dts/qcom/ipq6018.dtsi | 15 ++++++++++++++- >> 1 file changed, 14 insertions(+), 1 deletion(-) >> >> diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi >> index e59b9df96c7e..429ad7cb681c 100644 >> --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi >> +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi >> @@ -390,8 +390,21 @@ tcsr_mutex: hwlock@1905000 { >> }; >> >> tcsr: syscon@1937000 { >> - compatible = "qcom,tcsr-ipq6018", "syscon"; >> + compatible = "qcom,tcsr-ipq6018", "syscon", "simple-mfd"; >> reg = <0x0 0x01937000 0x0 0x21000>; >> + #address-cells = <1>; >> + #size-cells = <1>; >> + ranges = <0x0 0x0 0x01937000 0x21000>; > > Please put ranges just after reg. Sure, okay > > With that: > > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Thank you! Regards, Devi Priya > > Best regards, > Krzysztof >
diff --git a/arch/arm64/boot/dts/qcom/ipq6018.dtsi b/arch/arm64/boot/dts/qcom/ipq6018.dtsi index e59b9df96c7e..429ad7cb681c 100644 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi @@ -390,8 +390,21 @@ tcsr_mutex: hwlock@1905000 { }; tcsr: syscon@1937000 { - compatible = "qcom,tcsr-ipq6018", "syscon"; + compatible = "qcom,tcsr-ipq6018", "syscon", "simple-mfd"; reg = <0x0 0x01937000 0x0 0x21000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x0 0x01937000 0x21000>; + + pwm: pwm@a010 { + compatible = "qcom,ipq6018-pwm"; + reg = <0xa010 0x20>; + clocks = <&gcc GCC_ADSS_PWM_CLK>; + assigned-clocks = <&gcc GCC_ADSS_PWM_CLK>; + assigned-clock-rates = <100000000>; + #pwm-cells = <2>; + status = "disabled"; + }; }; usb2: usb@70f8800 {