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Tue, 3 Oct 2023 02:31:45 -0500 From: Alexey Kardashevskiy To: CC: , Ingo Molnar , "Borislav Petkov" , Tom Lendacky , "Alexey Kardashevskiy" Subject: [PATCH kernel v3] x86/compressed/64: reduce #VC nesting for intercepted CPUID for SEV-SNP guest Date: Tue, 3 Oct 2023 18:31:23 +1100 Message-ID: <20231003073123.1763564-1-aik@amd.com> X-Mailer: git-send-email 2.41.0 MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS3PEPF000099D9:EE_|DS7PR12MB6240:EE_ X-MS-Office365-Filtering-Correlation-Id: f4753995-f295-485e-90b3-08dbc3e2ced0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: ASfCNUv+8gD/qK2mnFSEMzoa/rLHtlVlr8bcspotj+J5CMnkorp66eM8ZXPAKWRbG2Bibl4ZXWmoX13vTd9ZauKtCeZEX+Q1G51YNR3dgmyAu/WHLhhooxuzTTJz/sfYQeH7nrSwwb2rRrFcK/mxVedLyabGd7OrUOSF/t5UgzGXF/9zOzqpU5bDBcg569SQ8oWt2Keb46mEpFXpJ8NUPFPO6GwkjSuIwSUeuwmNElPKcDJMgL7Vj0t/D8PBjXtuXMGiNdPvDHd5IBwWlF4WrqfRtIKVKKMjCRVdVpt92lbwJVAMmh9bxRVvhXEoTUE4zA20yJwKUud9TndFPIn/uUewIitErMyEYDTieeONa0vXgKXy8p6vrlwFPn/YNOhAzG9g5uITFLitNSlPGr2smr1DAJ6+kS+C5uxscCNb0TC/dMCBiCDnw6BY27yxPCGT5/+uKxq0x51MYti1jRqM7Znh7lbnpaJ+XbE0sIsR7ln9Ft0hk27JVhaLyUme+vF79TANL0+6nYUugWNp8nCZn8aVL5p+jTB2PbOmuTiY6dzskQMBqo59QyvtQwYNIPtQzkXN6ajcoRA1fGx3uXnZIY3bZRJM4EGLj5GVBgaNqH9sWs966ShzS9kpfd1D4MPZSSgO+9/8tqUox5HGIxGzSLLUsFcsfqTiMhSoEyvGEIgJPoeJNKEi7mnR6DBTxpoQ3djmXg5JX7L+V5o955qyLAwu3X6nWhJraZ/vjmTVCe5XPjNWZ4Mbcg/ddXNj+coC X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(39860400002)(376002)(346002)(136003)(396003)(230922051799003)(1800799009)(186009)(451199024)(82310400011)(64100799003)(40470700004)(36840700001)(46966006)(2616005)(2906002)(40460700003)(356005)(82740400003)(83380400001)(81166007)(336012)(26005)(47076005)(40480700001)(36756003)(36860700001)(1076003)(16526019)(426003)(966005)(316002)(8936002)(4326008)(8676002)(478600001)(5660300002)(6916009)(41300700001)(54906003)(70206006)(70586007)(6666004)(36900700001);DIR:OUT;SFP:1101; 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Tue, 03 Oct 2023 00:32:00 -0700 (PDT) X-getmail-retrieved-from-mailbox: INBOX X-GMAIL-THRID: 1778076200076363144 X-GMAIL-MSGID: 1778718680300965082 For certain intercepts an SNP guest uses the GHCB protocol to talk to the hypervisor from the #VC handler. The protocol requires a shared page so there is one per vCPU. In case NMI arrives in a middle of #VC or the NMI handler triggers a #VC, there is another "backup" GHCB page which stores the content of the first one while SVM_VMGEXIT_NMI_COMPLETE is sent. The vc_raw_handle_exception() handler manages main and backup GHCB pages via __sev_get_ghcb/__sev_put_ghcb. This works fine for #VC and occasional NMIs but not so fine when the #VC handler causes intercept + another #VC. If NMI arrives during the second #VC, there are no more pages for SVM_VMGEXIT_NMI_COMPLETE. The problem place is the #VC CPUID handler which reads an MSR which triggers another #VC and if "perf" was running, panic happens: Kernel panic - not syncing: Unable to handle #VC exception! GHCB and Backup GHCB are already in use Add a helper similar to native_read_msr_safe() for making a direct hypercall in the SEV-ES environment. Use the new helper instead of the raw "rdmsr" to avoid the extra #VC event. Fixes: ee0bfa08a345 ("x86/compressed/64: Add support for SEV-SNP CPUID table in #VC handlers") Signed-off-by: Alexey Kardashevskiy Reviewed-by: Ingo Molnar --- Based on: https://git.kernel.org/pub/scm/linux/kernel/git/bp/bp.git/log/?h=tip-x86-urgent which top at the time was: 62d5e970d022 "x86/sev: Change npages to unsigned long in snp_accept_memory()" --- Changes: v3: * made it a function, mimic native_read_msr_safe() which 1) returns value 2) returns an error * removed debug backtraces the commit log as these were added for debugging and never appear with actual kernels v2: * de-uglify by defining rdmsr_safe_GHCB() --- arch/x86/kernel/sev-shared.c | 27 +++++++++++++++++--- 1 file changed, 23 insertions(+), 4 deletions(-) diff --git a/arch/x86/kernel/sev-shared.c b/arch/x86/kernel/sev-shared.c index dcf325b7b022..494d92a71986 100644 --- a/arch/x86/kernel/sev-shared.c +++ b/arch/x86/kernel/sev-shared.c @@ -241,6 +241,25 @@ static enum es_result sev_es_ghcb_hv_call(struct ghcb *ghcb, return verify_exception_info(ghcb, ctxt); } + +/* Paravirt SEV-ES rdmsr which avoids extra #VC event */ +static unsigned long long ghcb_prot_read_msr(unsigned int msr, struct ghcb *ghcb, + struct es_em_ctxt *ctxt, int *err) +{ + unsigned long long ret = 0; + + ghcb_set_rcx(ghcb, msr); + + *err = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_MSR, 0, 0); + if (*err == ES_OK) + ret = (ghcb->save.rdx << 32) | ghcb->save.rax; + + /* Invalidate qwords for likely another following GHCB call */ + vc_ghcb_invalidate(ghcb); + + return ret; +} + static int __sev_cpuid_hv(u32 fn, int reg_idx, u32 *reg) { u64 val; @@ -477,11 +496,11 @@ static int snp_cpuid_postprocess(struct ghcb *ghcb, struct es_em_ctxt *ctxt, if (leaf->subfn == 1) { /* Get XSS value if XSAVES is enabled. */ if (leaf->eax & BIT(3)) { - unsigned long lo, hi; + int err = 0; - asm volatile("rdmsr" : "=a" (lo), "=d" (hi) - : "c" (MSR_IA32_XSS)); - xss = (hi << 32) | lo; + xss = ghcb_prot_read_msr(MSR_IA32_XSS, ghcb, ctxt, &err); + if (err != ES_OK) + return -EINVAL; } /*